nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 09:12:24 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: gsp: move msg info logs to debug logs

Browse Source 
Changes
- moved the message logs from info to gsp debug which can
be enabled on requirement.

Bug 4227016
Bug 4197632
Bug 4199856

Change-Id: I6067a9b37664d325d971ccc8e1a6c13c2d1b3bb7
Signed-off-by: vivekku <vivekku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2967169
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
This commit is contained in:
vivekku
2023-07-31 09:57:58 +00:00
committed by mobile promotions
parent 91ac1541a5
commit b426d710a2
4 changed files with 10 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/common/gsp/gsp_bootstrap.c
View File

@@ -162,7 +162,7 @@ int nvgpu_gsp_wait_for_mailbox_update(struct nvgpu_gsp *gsp,
mail_box_data = flcn->g->ops.falcon.mailbox_read( mail_box_data = flcn->g->ops.falcon.mailbox_read(
flcn, mailbox_index); flcn, mailbox_index);
if (mail_box_data == exp_value) { if (mail_box_data == exp_value) {
nvgpu_info(flcn->g, nvgpu_gsp_dbg(flcn->g,
"gsp mailbox-0 updated successful with 0x%x", "gsp mailbox-0 updated successful with 0x%x",
mail_box_data); mail_box_data);
break; break;

4
drivers/gpu/nvgpu/common/gsp_scheduler/gsp_scheduler.c
View File

@@ -54,7 +54,7 @@ void nvgpu_gsp_sched_suspend(struct gk20a *g, struct nvgpu_gsp_sched *gsp_sched)
nvgpu_gsp_dbg(g, " "); nvgpu_gsp_dbg(g, " ");
if (gsp == NULL) { if (gsp == NULL) {
nvgpu_info(g, "GSP not initialized"); nvgpu_err(g, "GSP not initialized");
return; return;
} }
@@ -222,7 +222,7 @@ int nvgpu_gsp_sched_bootstrap_hs(struct gk20a *g)
goto de_init; goto de_init;
} }
nvgpu_info(g, "gsp scheduler bootstrapped.\n"); nvgpu_gsp_dbg(g, "gsp scheduler bootstrapped.\n");
return status; return status;
de_init: de_init:
nvgpu_gsp_sched_sw_deinit(g); nvgpu_gsp_sched_sw_deinit(g);

8
drivers/gpu/nvgpu/common/gsp_scheduler/ipc/gsp_msg.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -174,10 +174,10 @@ int nvgpu_gsp_process_message(struct gk20a *g)
break; break;
} }
nvgpu_info(g, "read msg hdr: "); nvgpu_gsp_dbg(g, "read msg hdr: ");
nvgpu_info(g, "unit_id = 0x%08x, size = 0x%08x", nvgpu_gsp_dbg(g, "unit_id = 0x%08x, size = 0x%08x",
msg.hdr.unit_id, msg.hdr.size); msg.hdr.unit_id, msg.hdr.size);
nvgpu_info(g, "ctrl_flags = 0x%08x, seq_id = 0x%08x", nvgpu_gsp_dbg(g, "ctrl_flags = 0x%08x, seq_id = 0x%08x",
msg.hdr.ctrl_flags, msg.hdr.seq_id); msg.hdr.ctrl_flags, msg.hdr.seq_id);
status = gsp_response_handle(gsp_sched, &msg); status = gsp_response_handle(gsp_sched, &msg);

5
drivers/gpu/nvgpu/hal/gsp/gsp_ga10b.c
View File

@@ -28,6 +28,7 @@
#include <nvgpu/bug.h> #include <nvgpu/bug.h>
#include <nvgpu/nvgpu_err.h> #include <nvgpu/nvgpu_err.h>
#include <nvgpu/power_features/cg.h> #include <nvgpu/power_features/cg.h>
#include <nvgpu/gsp.h>
#ifdef CONFIG_NVGPU_GSP_SCHEDULER #ifdef CONFIG_NVGPU_GSP_SCHEDULER
#include <nvgpu/gsp.h> #include <nvgpu/gsp.h>
#include <nvgpu/string.h> #include <nvgpu/string.h>
@@ -127,10 +128,10 @@ bool ga10b_gsp_is_debug_mode_en(struct gk20a *g)
if (pgsp_falcon_hwcfg2_dbgmode_v(ctl_stat) == if (pgsp_falcon_hwcfg2_dbgmode_v(ctl_stat) ==
pgsp_falcon_hwcfg2_dbgmode_enable_v()) { pgsp_falcon_hwcfg2_dbgmode_enable_v()) {
nvgpu_info(g, "DEBUG MODE"); nvgpu_gsp_dbg(g, "DEBUG MODE");
return true; return true;
} else { } else {
nvgpu_info(g, "PROD MODE"); nvgpu_gsp_dbg(g, "PROD MODE");
return false; return false;
} }
} }