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gpu: nvgpu: userspace: update "Targets" field for mm

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Update "Targets" doxygen field for all unit tests in mm
to replace usage of nested gops_mm structure.

Jira NVGPU-6927

Change-Id: Ib90e71e98e5227e6f3a4b04584a82c0e1abb5ee0
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2532919
(cherry picked from commit 2769ccf4e2d1f053bcb73227909bad82268877b9)
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2532890
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Antony Clince Alex
2021-05-21 09:18:19 +00:00
committed by mobile promotions
parent c50b39f599
commit b49e364043
6 changed files with 34 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
userspace/units/mm/gmmu/page_table/page_table.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -69,8 +69,8 @@ int test_nvgpu_gmmu_map_unmap_map_fail(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: nvgpu_gmmu_map_fixed, gops_mm.gops_mm_gmmu.map, nvgpu_gmmu_map,
* nvgpu_get_pte, gops_mm.gops_mm_gmmu.unmap, nvgpu_gmmu_unmap
* Targets: nvgpu_gmmu_map_fixed, gops_mm_gmmu.map, nvgpu_gmmu_map,
* nvgpu_get_pte, gops_mm_gmmu.unmap, nvgpu_gmmu_unmap
*
* Input: args as a struct test_parameters to hold scenario and test parameters.
*
@@ -103,8 +103,8 @@ int test_nvgpu_gmmu_map_unmap(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.map, nvgpu_gmmu_map_locked,
* gops_mm.gops_mm_gmmu.unmap, nvgpu_gmmu_unmap, gk20a_from_vm
* Targets: gops_mm_gmmu.map, nvgpu_gmmu_map_locked,
* gops_mm_gmmu.unmap, nvgpu_gmmu_unmap, gk20a_from_vm
*
* Input: args as a struct test_parameters to hold scenario and test parameters.
*
@@ -129,7 +129,7 @@ int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: nvgpu_gmmu_map_locked, nvgpu_gmmu_unmap, gops_mm.gops_mm_gmmu.unmap,
* Targets: nvgpu_gmmu_map_locked, nvgpu_gmmu_unmap, gops_mm_gmmu.unmap,
* nvgpu_gmmu_unmap_locked
*
* Input: args as a struct test_parameters to hold scenario and test parameters.
@@ -159,8 +159,8 @@ int test_nvgpu_gmmu_map_unmap_batched(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: nvgpu_vm_init, nvgpu_gmmu_map, gops_mm.gops_mm_gmmu.map,
* nvgpu_gmmu_map_locked, gops_mm.gops_mm_gmmu.unmap, nvgpu_gmmu_unmap,
* Targets: nvgpu_vm_init, nvgpu_gmmu_map, gops_mm_gmmu.map,
* nvgpu_gmmu_map_locked, gops_mm_gmmu.unmap, nvgpu_gmmu_unmap,
* nvgpu_vm_put
*
* Input: None
@@ -192,8 +192,8 @@ int test_nvgpu_page_table_c1_full(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: nvgpu_vm_init, gops_mm.gops_mm_gmmu.map, nvgpu_gmmu_map_fixed,
* gops_mm.gops_mm_gmmu.unmap, nvgpu_gmmu_unmap, nvgpu_vm_put
* Targets: nvgpu_vm_init, gops_mm_gmmu.map, nvgpu_gmmu_map_fixed,
* gops_mm_gmmu.unmap, nvgpu_gmmu_unmap, nvgpu_vm_put
*
* Input: None
*

4
userspace/units/mm/hal/gmmu/gmmu_gm20b_fusa/gmmu-gm20b-fusa.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,7 +39,7 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.get_big_page_sizes, gm20b_mm_get_big_page_sizes
* Targets: gops_mm_gmmu.get_big_page_sizes, gm20b_mm_get_big_page_sizes
*
* Input: test_env_init
*

12
userspace/units/mm/hal/gmmu/gmmu_gp10b_fusa/gmmu-gp10b-fusa.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,7 +39,11 @@ struct unit_module;
*
* Test Type: Feature
*
<<<<<<< HEAD
* Targets: gops_mm.gops_mm_gmmu.get_default_big_page_size,
=======
* Targets: gops_mm_gmmu.get_default_big_page_size,
>>>>>>> 2769ccf4e... gpu: nvgpu: userspace: update "Targets" field for mm
* nvgpu_gmmu_default_big_page_size
*
* Input: None
@@ -60,7 +64,7 @@ int test_gp10b_mm_get_default_big_page_size(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.get_iommu_bit, gp10b_mm_get_iommu_bit
* Targets: gops_mm_gmmu.get_iommu_bit, gp10b_mm_get_iommu_bit
*
* Input: None
*
@@ -80,7 +84,7 @@ int test_gp10b_mm_get_iommu_bit(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.get_max_page_table_levels,
* Targets: gops_mm_gmmu.get_max_page_table_levels,
* gp10b_get_max_page_table_levels
*
* Input: None
@@ -101,7 +105,7 @@ int test_gp10b_get_max_page_table_levels(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.get_mmu_levels, gp10b_mm_get_mmu_levels
* Targets: gops_mm_gmmu.get_mmu_levels, gp10b_mm_get_mmu_levels
*
* Input: None
*

4
userspace/units/mm/hal/gmmu/gmmu_gv11b_fusa/gmmu-gv11b-fusa.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,7 +39,7 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_gmmu.gpu_phys_addr, gv11b_gpu_phys_addr
* Targets: gops_mm_gmmu.gpu_phys_addr, gv11b_gpu_phys_addr
*
* Input: args (value can be F_GV11B_GPU_PHYS_ADDR_GMMU_ATTRS_NULL,
* F_GV11B_GPU_PHYS_ADDR_L3_ALLOC_FALSE or

10
userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -59,8 +59,8 @@ int test_env_init_mm_mmu_fault_gv11b_fusa(struct unit_module *m,
*
* Test Type: Feature, Error injection
*
* Targets: gops_mm.gops_mm_mmu_fault.setup_sw, gv11b_mm_mmu_fault_setup_sw,
* gops_mm.gops_mm_mmu_fault.info_mem_destroy,
* Targets: gops_mm_mmu_fault.setup_sw, gv11b_mm_mmu_fault_setup_sw,
* gops_mm_mmu_fault.info_mem_destroy,
* gv11b_mm_mmu_fault_info_mem_destroy
*
* Input: test_env_init
@@ -83,7 +83,7 @@ int test_gv11b_mm_mmu_fault_setup_sw(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_mmu_fault.setup_hw, gv11b_mm_mmu_fault_setup_hw
* Targets: gops_mm_mmu_fault.setup_hw, gv11b_mm_mmu_fault_setup_hw
*
* Input: test_env_init
*
@@ -104,7 +104,7 @@ int test_gv11b_mm_mmu_fault_setup_hw(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_mmu_fault.disable_hw, gv11b_mm_mmu_fault_disable_hw
* Targets: gops_mm_mmu_fault.disable_hw, gv11b_mm_mmu_fault_disable_hw
*
* Input: test_env_init
*

10
userspace/units/mm/page_table_faults/page_table_faults.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -92,7 +92,7 @@ int test_page_faults_pending(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: gops_mm.gops_mm_mmu_fault.disable_hw, gv11b_mm_mmu_fault_disable_hw,
* Targets: gops_mm_mmu_fault.disable_hw, gv11b_mm_mmu_fault_disable_hw,
* gops_fb.is_fault_buf_enabled, gv11b_fb_is_fault_buf_enabled
*
* Input: test_page_faults_init
@@ -120,7 +120,11 @@ int test_page_faults_disable_hw(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
<<<<<<< HEAD
* Targets: gops_mm.gops_mm_gmmu.get_default_big_page_size,
=======
* Targets: gops_mm_gmmu.get_default_big_page_size,
>>>>>>> 2769ccf4e... gpu: nvgpu: userspace: update "Targets" field for mm
* nvgpu_gmmu_default_big_page_size, nvgpu_alloc_inst_block,
* gops_mm.init_inst_block, gv11b_mm_init_inst_block
*
@@ -148,7 +152,7 @@ int test_page_faults_inst_block(struct unit_module *m, struct gk20a *g,
*
* Test Type: De-init
*
* Targets: gops_mm.gops_mm_mmu_fault.info_mem_destroy,
* Targets: gops_mm_mmu_fault.info_mem_destroy,
* gv11b_mm_mmu_fault_info_mem_destroy, nvgpu_vm_put
*
* Input: test_page_faults_init