gpu: nvgpu: Fix MISRA 8.2 violations

MISRA rule 8.2 makes it mandatory for all function prototypes
to have named parameters. There were few instances where parameter
name(s) for function prototypes were omitted. This patch will
fix the same.

JIRA NVGPU-861

Change-Id: I6cb28482becc2938c574b7d8c6f22463d346d27a
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1917939
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/gk20a/fence_gk20a.c

@@ -32,9 +32,9 @@
 #include <nvgpu/channel.h>
 
 struct gk20a_fence_ops {
-	int (*wait)(struct gk20a_fence *, long timeout);
-	bool (*is_expired)(struct gk20a_fence *);
-	void *(*free)(struct nvgpu_ref *);
+	int (*wait)(struct gk20a_fence *f, long timeout);
+	bool (*is_expired)(struct gk20a_fence *f);
+	void *(*free)(struct nvgpu_ref *ref);
 };
 
 static void gk20a_fence_free(struct nvgpu_ref *ref)

drivers/gpu/nvgpu/gk20a/fifo_gk20a.h

@@ -190,7 +190,7 @@ struct fifo_gk20a {
 	struct tsg_gk20a *tsg;
 	struct nvgpu_mutex tsg_inuse_mutex;
 
-	void (*remove_support)(struct fifo_gk20a *);
+	void (*remove_support)(struct fifo_gk20a *f);
 	bool sw_ready;
 	struct {
 		/* share info between isrs and non-isr code */

drivers/gpu/nvgpu/gk20a/gr_gk20a.h

@@ -241,7 +241,7 @@ struct gr_gk20a_isr_data {
 };
 
 struct gr_ctx_buffer_desc {
-	void (*destroy)(struct gk20a *, struct gr_ctx_buffer_desc *);
+	void (*destroy)(struct gk20a *g, struct gr_ctx_buffer_desc *desc);
 	struct nvgpu_mem mem;
 	void *priv;
 };

drivers/gpu/nvgpu/include/nvgpu/channel.h

@@ -353,7 +353,7 @@ static inline bool gk20a_channel_as_bound(struct channel_gk20a *ch)
 	return !!ch->vm;
 }
 int channel_gk20a_commit_va(struct channel_gk20a *c);
-int gk20a_init_channel_support(struct gk20a *, u32 chid);
+int gk20a_init_channel_support(struct gk20a *g, u32 chid);
 
 /* must be inside gk20a_busy()..gk20a_idle() */
 void gk20a_channel_close(struct channel_gk20a *ch);

drivers/gpu/nvgpu/include/nvgpu/gk20a.h

@@ -669,7 +669,7 @@ struct gpu_ops {
 					u32 runlist_id,
 					u32 new_level);
 		int (*tsg_set_timeslice)(struct tsg_gk20a *tsg, u32 timeslice);
-		u32 (*default_timeslice_us)(struct gk20a *);
+		u32 (*default_timeslice_us)(struct gk20a *g);
 		int (*force_reset_ch)(struct channel_gk20a *ch,
 					u32 err_code, bool verbose);
 		enum fifo_engine (*engine_enum_from_type)(struct gk20a *g,
@@ -1241,7 +1241,7 @@ struct gpu_ops {
 		int (*read_ptimer)(struct gk20a *g, u64 *value);
 		int (*get_timestamps_zipper)(struct gk20a *g,
 			u32 source_id, u32 count,
-			struct nvgpu_cpu_time_correlation_sample *);
+			struct nvgpu_cpu_time_correlation_sample *samples);
 	} ptimer;
 
 	struct {
@@ -1561,7 +1561,7 @@ struct gk20a {
 	bool global_profiler_reservation_held;
 	int profiler_reservation_count;
 
-	void (*remove_support)(struct gk20a *);
+	void (*remove_support)(struct gk20a *g);
 
 	u64 pg_ingating_time_us;
 	u64 pg_ungating_time_us;

drivers/gpu/nvgpu/include/nvgpu/pmu.h

@@ -186,8 +186,8 @@ enum {
 			(_size), _cb, _cbp, false);	\
 	} while (0)
 
-typedef void (*pmu_callback)(struct gk20a *, struct pmu_msg *, void *, u32,
-	u32);
+typedef void (*pmu_callback)(struct gk20a *g, struct pmu_msg *msg, void *param,
+		u32 handle, u32 status);
 
 struct rpc_handler_payload {
 	void *rpc_buff;

drivers/gpu/nvgpu/include/nvgpu/sec2.h

@@ -53,8 +53,8 @@ enum {
 	SEC2_SEQ_STATE_CANCELLED
 };
 
-typedef void (*sec2_callback)(struct gk20a *, struct nv_flcn_msg_sec2 *,
-	void *, u32, u32);
+typedef void (*sec2_callback)(struct gk20a *g, struct nv_flcn_msg_sec2 *msg,
+	void *param, u32 handle, u32 status);
 
 struct sec2_sequence {
 	u8 id;

drivers/gpu/nvgpu/include/nvgpu/sim.h

@@ -34,8 +34,8 @@ struct sim_nvgpu {
 	struct nvgpu_mem send_bfr;
 	struct nvgpu_mem recv_bfr;
 	struct nvgpu_mem msg_bfr;
-	void (*sim_init_late)(struct gk20a *);
-	void (*remove_support)(struct gk20a *);
+	void (*sim_init_late)(struct gk20a *g);
+	void (*remove_support)(struct gk20a *g);
 	void (*esc_readl)(
 		struct gk20a *g, char *path, u32 index, u32 *data);
 };