gpu: nvgpu: MISRA 10.1 boolean fixes

MISRA rule 10.1 doesn't allow the usage of non-boolean variables as
booleans. Fix violations where a variable of type non-boolean is used
as a boolean.

JIRA NVGPU-646

Change-Id: If451037ada9a5f41b0cddb50778de57f60864f5c
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815742
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Amurthyreddy
2018-11-13 10:09:42 +05:30
committed by mobile promotions
parent 359a8b82d9
commit b68e465fab
21 changed files with 55 additions and 52 deletions

View File

@@ -61,7 +61,7 @@ static int pmu_handle_perf_event(struct gk20a *g, void *pmu_msg)
nvgpu_clk_arb_schedule_vf_table_update(g);
break;
default:
WARN_ON(1);
WARN_ON(true);
break;
}
return 0;

View File

@@ -258,7 +258,7 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
equ_type = CTRL_PERF_VFE_EQU_TYPE_MINMAX;
equ_data.minmax.b_max = BIOS_GET_FIELD(equ.param0,
VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_CRIT) &&
VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_CRIT_MAX;
(VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_CRIT_MAX != 0U);
equ_data.minmax.equ_idx0 = (u8)BIOS_GET_FIELD(
equ.param0,
VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_VFE_EQU_IDX_0);

View File

@@ -988,9 +988,9 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
(u8)BIOS_GET_FIELD(var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_EXPECTED_VER);
var_data.single_sensed_fuse.vfield_ver_info.b_use_default_on_ver_check_fail =
(BIOS_GET_FIELD(var.param0,
BIOS_GET_FIELD(var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_USE_DEFAULT_ON_VER_CHECK_FAIL) &&
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_USE_DEFAULT_ON_VER_CHECK_FAIL_YES);
(VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_USE_DEFAULT_ON_VER_CHECK_FAIL_YES != 0U);
var_data.single_sensed_fuse.b_fuse_value_signed =
(u8)BIOS_GET_FIELD(var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_VALUE_SIGNED_INTEGER);