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gpu: nvgpu: Rename gk20a_mem_* functions

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Rename the functions used for mem_desc access to nvgpu_mem_*.

JIRA NVGPU-12

Change-Id: Ibfdc1112d43f0a125e4487c250e3f977ffd2cd75
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1323325
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2017-03-15 16:42:12 -07:00
committed by mobile promotions
parent fa4ecf5730
commit b69020bff5
28 changed files with 318 additions and 317 deletions
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28
drivers/gpu/nvgpu/common/linux/mem_desc.c
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@@ -20,7 +20,7 @@
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
u32 __gk20a_aperture_mask(struct gk20a *g, enum gk20a_aperture aperture,
u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture,
u32 sysmem_mask, u32 vidmem_mask)
{
switch (aperture) {
@@ -36,14 +36,14 @@ u32 __gk20a_aperture_mask(struct gk20a *g, enum gk20a_aperture aperture,
return 0;
}
u32 gk20a_aperture_mask(struct gk20a *g, struct mem_desc *mem,
u32 nvgpu_aperture_mask(struct gk20a *g, struct mem_desc *mem,
u32 sysmem_mask, u32 vidmem_mask)
{
return __gk20a_aperture_mask(g, mem->aperture,
return __nvgpu_aperture_mask(g, mem->aperture,
sysmem_mask, vidmem_mask);
}
int gk20a_mem_begin(struct gk20a *g, struct mem_desc *mem)
int nvgpu_mem_begin(struct gk20a *g, struct mem_desc *mem)
{
void *cpu_va;
@@ -66,7 +66,7 @@ int gk20a_mem_begin(struct gk20a *g, struct mem_desc *mem)
return 0;
}
void gk20a_mem_end(struct gk20a *g, struct mem_desc *mem)
void nvgpu_mem_end(struct gk20a *g, struct mem_desc *mem)
{
if (mem->aperture != APERTURE_SYSMEM || g->mm.force_pramin)
return;
@@ -75,7 +75,7 @@ void gk20a_mem_end(struct gk20a *g, struct mem_desc *mem)
mem->cpu_va = NULL;
}
u32 gk20a_mem_rd32(struct gk20a *g, struct mem_desc *mem, u32 w)
u32 nvgpu_mem_rd32(struct gk20a *g, struct mem_desc *mem, u32 w)
{
u32 data = 0;
@@ -103,13 +103,13 @@ u32 gk20a_mem_rd32(struct gk20a *g, struct mem_desc *mem, u32 w)
return data;
}
u32 gk20a_mem_rd(struct gk20a *g, struct mem_desc *mem, u32 offset)
u32 nvgpu_mem_rd(struct gk20a *g, struct mem_desc *mem, u32 offset)
{
WARN_ON(offset & 3);
return gk20a_mem_rd32(g, mem, offset / sizeof(u32));
return nvgpu_mem_rd32(g, mem, offset / sizeof(u32));
}
void gk20a_mem_rd_n(struct gk20a *g, struct mem_desc *mem,
void nvgpu_mem_rd_n(struct gk20a *g, struct mem_desc *mem,
u32 offset, void *dest, u32 size)
{
WARN_ON(offset & 3);
@@ -135,7 +135,7 @@ void gk20a_mem_rd_n(struct gk20a *g, struct mem_desc *mem,
}
}
void gk20a_mem_wr32(struct gk20a *g, struct mem_desc *mem, u32 w, u32 data)
void nvgpu_mem_wr32(struct gk20a *g, struct mem_desc *mem, u32 w, u32 data)
{
if (mem->aperture == APERTURE_SYSMEM && !g->mm.force_pramin) {
u32 *ptr = mem->cpu_va;
@@ -158,13 +158,13 @@ void gk20a_mem_wr32(struct gk20a *g, struct mem_desc *mem, u32 w, u32 data)
}
}
void gk20a_mem_wr(struct gk20a *g, struct mem_desc *mem, u32 offset, u32 data)
void nvgpu_mem_wr(struct gk20a *g, struct mem_desc *mem, u32 offset, u32 data)
{
WARN_ON(offset & 3);
gk20a_mem_wr32(g, mem, offset / sizeof(u32), data);
nvgpu_mem_wr32(g, mem, offset / sizeof(u32), data);
}
void gk20a_mem_wr_n(struct gk20a *g, struct mem_desc *mem, u32 offset,
void nvgpu_mem_wr_n(struct gk20a *g, struct mem_desc *mem, u32 offset,
void *src, u32 size)
{
WARN_ON(offset & 3);
@@ -192,7 +192,7 @@ void gk20a_mem_wr_n(struct gk20a *g, struct mem_desc *mem, u32 offset,
}
}
void gk20a_memset(struct gk20a *g, struct mem_desc *mem, u32 offset,
void nvgpu_memset(struct gk20a *g, struct mem_desc *mem, u32 offset,
u32 c, u32 size)
{
WARN_ON(offset & 3);