From b7061a3263c7b185314e36583825fbe7134a2a49 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Mon, 17 Jun 2019 12:45:01 +0530 Subject: [PATCH] gpu: nvgpu: compile out changes for dgpu falcons SW handling of dgpu falcons GSPLITE, NVDEC, SEC2, MINION needs to be compiled out in the igpu safety build. Also compile out gp106 falcon and nvdec sources. JIRA NVGPU-3539 Change-Id: If4d21cec151b6c00f944457dc6cae4f457043b04 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2137226 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile.sources | 4 +-- .../nvgpu/common/acr/acr_blob_construct_v1.c | 2 ++ .../nvgpu/common/acr/acr_blob_construct_v1.h | 2 ++ drivers/gpu/nvgpu/common/acr/acr_bootstrap.c | 2 ++ drivers/gpu/nvgpu/common/falcon/falcon.c | 14 +++++---- drivers/gpu/nvgpu/common/init/nvgpu_init.c | 31 ++++++++++--------- drivers/gpu/nvgpu/include/nvgpu/falcon.h | 6 +++- 7 files changed, 37 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 3e4dd9089..98037d4ee 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -100,7 +100,6 @@ srcs += common/utils/enabled.c \ common/ecc.c \ common/falcon/falcon.c \ common/falcon/falcon_sw_gk20a.c \ - common/falcon/falcon_sw_gp106.c \ common/gr/gr.c \ common/gr/gr_utils.c \ common/gr/gr_intr.c \ @@ -261,7 +260,6 @@ srcs += common/utils/enabled.c \ hal/netlist/netlist_gm20b.c \ hal/netlist/netlist_gp10b.c \ hal/netlist/netlist_gv11b.c \ - hal/nvdec/nvdec_gp106.c \ hal/sync/sema_cmdbuf_gk20a.c \ hal/sync/sema_cmdbuf_gv11b.c \ hal/sync/syncpt_cmdbuf_gk20a.c \ @@ -494,6 +492,7 @@ srcs += common/sec2/sec2.c \ common/vbios/bios.c \ common/vbios/bios_sw_gv100.c \ common/vbios/bios_sw_tu104.c \ + common/falcon/falcon_sw_gp106.c \ common/falcon/falcon_sw_gv100.c \ common/falcon/falcon_sw_tu104.c \ common/acr/acr_sw_gv100.c \ @@ -535,6 +534,7 @@ srcs += common/sec2/sec2.c \ hal/fuse/fuse_gp106.c \ hal/netlist/netlist_gv100.c \ hal/netlist/netlist_tu104.c \ + hal/nvdec/nvdec_gp106.c \ hal/nvdec/nvdec_tu104.c \ hal/gsp/gsp_gv100.c \ hal/sec2/sec2_gp106.c \ diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c index 4240ceba7..61314bbc7 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c @@ -253,6 +253,7 @@ rel_sig: return err; } +#ifdef CONFIG_NVGPU_DGPU int nvgpu_acr_lsf_sec2_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img) { struct nvgpu_firmware *sec2_fw, *sec2_desc, *sec2_sig; @@ -321,6 +322,7 @@ release_img_fw: nvgpu_release_firmware(g, sec2_fw); return err; } +#endif /* * lsfm_parse_no_loader_ucode: parses UCODE header of falcon & updates diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.h b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.h index 74e6365c4..8875d9c88 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.h +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.h @@ -235,6 +235,8 @@ int nvgpu_acr_prepare_ucode_blob_v1(struct gk20a *g); int nvgpu_acr_lsf_pmu_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img); int nvgpu_acr_lsf_fecs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img); int nvgpu_acr_lsf_gpccs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img); +#ifdef CONFIG_NVGPU_DGPU int nvgpu_acr_lsf_sec2_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img); +#endif #endif /* ACR_BLOB_CONSTRUCT_V1_H */ diff --git a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c index 64179536c..825e0b3ee 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c +++ b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c @@ -112,6 +112,7 @@ struct vm_gk20a* acr_get_engine_vm(struct gk20a *g, u32 falcon_id) case FALCON_ID_PMU: vm = g->mm.pmu.vm; break; +#ifdef CONFIG_NVGPU_DGPU case FALCON_ID_SEC2: if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_VM)) { vm = g->mm.sec2.vm; @@ -122,6 +123,7 @@ struct vm_gk20a* acr_get_engine_vm(struct gk20a *g, u32 falcon_id) vm = g->mm.gsp.vm; } break; +#endif default: vm = NULL; break; diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c index 3913e1ca6..f6ac0e4e7 100644 --- a/drivers/gpu/nvgpu/common/falcon/falcon.c +++ b/drivers/gpu/nvgpu/common/falcon/falcon.c @@ -650,24 +650,26 @@ static struct nvgpu_falcon *falcon_get_instance(struct gk20a *g, u32 flcn_id) case FALCON_ID_PMU: flcn = &g->pmu_flcn; break; - case FALCON_ID_SEC2: - flcn = &g->sec2.flcn; - break; case FALCON_ID_FECS: flcn = &g->fecs_flcn; break; case FALCON_ID_GPCCS: flcn = &g->gpccs_flcn; break; +#ifdef CONFIG_NVGPU_DGPU + case FALCON_ID_GSPLITE: + flcn = &g->gsp_flcn; + break; case FALCON_ID_NVDEC: flcn = &g->nvdec_flcn; break; + case FALCON_ID_SEC2: + flcn = &g->sec2.flcn; + break; case FALCON_ID_MINION: flcn = &g->minion_flcn; break; - case FALCON_ID_GSPLITE: - flcn = &g->gsp_flcn; - break; +#endif default: nvgpu_err(g, "Invalid/Unsupported falcon ID %x", flcn_id); break; diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c index d84f7c97d..7174261fd 100644 --- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c +++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c @@ -128,11 +128,14 @@ int gk20a_prepare_poweroff(struct gk20a *g) ret = tmp_ret; } + nvgpu_falcon_sw_free(g, FALCON_ID_PMU); nvgpu_falcon_sw_free(g, FALCON_ID_FECS); + +#ifdef CONFIG_NVGPU_DGPU nvgpu_falcon_sw_free(g, FALCON_ID_GSPLITE); nvgpu_falcon_sw_free(g, FALCON_ID_NVDEC); nvgpu_falcon_sw_free(g, FALCON_ID_SEC2); - nvgpu_falcon_sw_free(g, FALCON_ID_PMU); +#endif #ifdef CONFIG_NVGPU_CE nvgpu_ce_suspend(g); @@ -197,33 +200,31 @@ int gk20a_finalize_poweron(struct gk20a *g) goto exit; } + err = nvgpu_falcon_sw_init(g, FALCON_ID_FECS); + if (err != 0) { + nvgpu_err(g, "failed to sw init FALCON_ID_FECS"); + goto done_pmu; + } + #ifdef CONFIG_NVGPU_DGPU err = nvgpu_falcon_sw_init(g, FALCON_ID_SEC2); if (err != 0) { nvgpu_err(g, "failed to sw init FALCON_ID_SEC2"); - goto done_pmu; + goto done_fecs; } -#endif err = nvgpu_falcon_sw_init(g, FALCON_ID_NVDEC); if (err != 0) { nvgpu_err(g, "failed to sw init FALCON_ID_NVDEC"); -#ifdef CONFIG_NVGPU_DGPU goto done_sec2; -#else - goto done_pmu; -#endif } + err = nvgpu_falcon_sw_init(g, FALCON_ID_GSPLITE); if (err != 0) { nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE"); goto done_nvdec; } - err = nvgpu_falcon_sw_init(g, FALCON_ID_FECS); - if (err != 0) { - nvgpu_err(g, "failed to sw init FALCON_ID_FECS"); - goto done_gsp; - } +#endif err = nvgpu_pmu_early_init(g, &g->pmu); if (err != 0) { @@ -528,15 +529,15 @@ int gk20a_finalize_poweron(struct gk20a *g) goto exit; done: - nvgpu_falcon_sw_free(g, FALCON_ID_FECS); -done_gsp: +#ifdef CONFIG_NVGPU_DGPU nvgpu_falcon_sw_free(g, FALCON_ID_GSPLITE); done_nvdec: nvgpu_falcon_sw_free(g, FALCON_ID_NVDEC); -#ifdef CONFIG_NVGPU_DGPU done_sec2: nvgpu_falcon_sw_free(g, FALCON_ID_SEC2); +done_fecs: #endif + nvgpu_falcon_sw_free(g, FALCON_ID_FECS); done_pmu: nvgpu_falcon_sw_free(g, FALCON_ID_PMU); exit: diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h index 48e210c0e..5361057a0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h +++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h @@ -30,12 +30,16 @@ * Falcon Id Defines */ #define FALCON_ID_PMU (0U) -#define FALCON_ID_GSPLITE (1U) #define FALCON_ID_FECS (2U) #define FALCON_ID_GPCCS (3U) + +#ifdef CONFIG_NVGPU_DGPU +#define FALCON_ID_GSPLITE (1U) #define FALCON_ID_NVDEC (4U) #define FALCON_ID_SEC2 (7U) #define FALCON_ID_MINION (10U) +#endif + #define FALCON_ID_END (11U) #define FALCON_ID_INVALID 0xFFFFFFFFU