diff --git a/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a.h b/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a.h
index b592f724b..e430d91f0 100644
--- a/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a.h
+++ b/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -86,6 +86,7 @@ void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable,
 
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn);
+void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn);
 #endif
 
 #if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
diff --git a/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c b/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c
index ad42f2342..3093f165f 100644
--- a/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c
+++ b/drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -600,6 +600,18 @@ void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn)
 		nvgpu_falcon_readl(flcn, falcon_falcon_curctx_r()));
 	nvgpu_err(g, "falcon_falcon_nxtctx_r : 0x%x",
 		nvgpu_falcon_readl(flcn, falcon_falcon_nxtctx_r()));
+
+	if (g->ops.falcon.dump_falcon_info != NULL) {
+		g->ops.falcon.dump_falcon_info(flcn);
+	}
+}
+
+void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn)
+{
+	struct gk20a *g = NULL;
+
+	g = flcn->g;
+
 	/*
 	 * Common Falcon code accesses each engine's falcon registers
 	 * using engine's falcon base address + offset.
diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga100.c b/drivers/gpu/nvgpu/hal/init/hal_ga100.c
index 5a7fc62ed..5632ceb53 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_ga100.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_ga100.c
@@ -1644,6 +1644,7 @@ static const struct gops_falcon ga100_ops_falcon = {
 	.set_irq = gk20a_falcon_set_irq,
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	.dump_falcon_stats = gk20a_falcon_dump_stats,
+	.dump_falcon_info = gk20a_falcon_dump_info,
 #endif
 	.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
 #ifdef CONFIG_NVGPU_FALCON_NON_FUSA
diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
index bf82b6fc6..a5715668f 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
@@ -1656,6 +1656,7 @@ static const struct gops_falcon ga10b_ops_falcon = {
 	.set_irq = gk20a_falcon_set_irq,
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	.dump_falcon_stats = ga10b_falcon_dump_stats,
+	.dump_falcon_info = gk20a_falcon_dump_info,
 #endif
 #if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
 	.copy_from_dmem = gk20a_falcon_copy_from_dmem,
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
index 6ef11b00f..ab9ddd9a2 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
@@ -1,7 +1,7 @@
 /*
  * GM20B Graphics
  *
- * Copyright (c) 2014-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -1023,6 +1023,7 @@ static const struct gops_falcon gm20b_ops_falcon = {
 	.mailbox_write = gk20a_falcon_mailbox_write,
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	.dump_falcon_stats = gk20a_falcon_dump_stats,
+	.dump_falcon_info = gk20a_falcon_dump_info,
 #endif
 #ifdef CONFIG_NVGPU_FALCON_NON_FUSA
 	.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
index 57d5996d9..c6c11b8e2 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
@@ -1422,6 +1422,7 @@ static const struct gops_falcon gv11b_ops_falcon = {
 	.set_irq = gk20a_falcon_set_irq,
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	.dump_falcon_stats = gk20a_falcon_dump_stats,
+	.dump_falcon_info = gk20a_falcon_dump_info,
 #endif
 #ifdef CONFIG_NVGPU_FALCON_NON_FUSA
 	.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
index a2f3e487d..72b96ce07 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
@@ -1513,6 +1513,7 @@ static const struct gops_falcon tu104_ops_falcon = {
 	.set_irq = gk20a_falcon_set_irq,
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	.dump_falcon_stats = gk20a_falcon_dump_stats,
+	.dump_falcon_info = gk20a_falcon_dump_info,
 #endif
 	.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
 #ifdef CONFIG_NVGPU_FALCON_NON_FUSA
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/gops/falcon.h
index 1794dc511..7d476e4e0 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gops/falcon.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gops/falcon.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -70,6 +70,7 @@ struct gops_falcon {
 			u32 intr_mask, u32 intr_dest);
 #ifdef CONFIG_NVGPU_FALCON_DEBUG
 	void (*dump_falcon_stats)(struct nvgpu_falcon *flcn);
+	void (*dump_falcon_info)(struct nvgpu_falcon *flcn);
 #endif
 #if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
 	int (*copy_from_dmem)(struct nvgpu_falcon *flcn,