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gpu: nvgpu: Cleanup macro in clk_gm20b.c
Cleanup a macro in clk_gm20b.c to not use pr_info() - instead use nvgpu_info(). Also add necessary includes. JIRA NVGPU-525 Change-Id: I2dcaf41c1e31131acf63b24b33b5a24795128024 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1673813 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -28,6 +28,8 @@
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#include <nvgpu/soc.h>
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#include <nvgpu/fuse.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/log.h>
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#include <nvgpu/types.h>
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#include <nvgpu/hw/gm20b/hw_trim_gm20b.h>
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#include <nvgpu/hw/gm20b/hw_timer_gm20b.h>
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@@ -84,24 +86,26 @@ static struct pll_parms gpc_pll_params;
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static void clk_setup_slide(struct gk20a *g, u32 clk_u);
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#define DUMP_REG(addr_func) \
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do { \
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addr = trim_sys_##addr_func##_r(); \
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data = gk20a_readl(g, addr); \
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pr_info(#addr_func "[0x%x] = 0x%x\n", addr, data); \
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} while (0)
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static void dump_gpc_pll(struct gk20a *g, struct pll *gpll, u32 last_cfg)
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{
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u32 addr, data;
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#define __DUMP_REG(__addr_str__) \
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do { \
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u32 __addr__ = trim_sys_ ## __addr_str__ ## _r(); \
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u32 __data__ = gk20a_readl(g, __addr__); \
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\
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nvgpu_info(g, " " #__addr_str__ " [0x%x] = 0x%x", \
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__addr__, __data__); \
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} while (0)
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pr_info("**** GPCPLL DUMP ****");
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pr_info("gpcpll s/w M=%u N=%u P=%u\n", gpll->M, gpll->N, gpll->PL);
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pr_info("gpcpll_cfg_last = 0x%x\n", last_cfg);
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DUMP_REG(gpcpll_cfg);
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DUMP_REG(gpcpll_coeff);
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DUMP_REG(sel_vco);
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pr_info("\n");
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nvgpu_info(g, "GPCPLL DUMP:");
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nvgpu_info(g, " gpcpll s/w M=%u N=%u P=%u\n", gpll->M, gpll->N, gpll->PL);
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nvgpu_info(g, " gpcpll_cfg_last = 0x%x\n", last_cfg);
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__DUMP_REG(gpcpll_cfg);
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__DUMP_REG(gpcpll_coeff);
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__DUMP_REG(sel_vco);
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#undef __DUMP_REG
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}
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#define PLDIV_GLITCHLESS 1
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