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gpu: nvgpu: Fix some barrier usage

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Commit 81868a187f updated barrier
usage to use the nvgpu wrappers and in doing so downgraded many
plain barriers {mb(), wmb(), rmb()} to the SMP versions of these
barriers.

The SMP version of the barriers in question are only issued
when running on an SMP machine. In most of the cases mentioned
above this is fine since the barriers are present to faciliate
proper ordering across CPUs. A single CPU is always coherent
with itself, so on a non-SMP case we don't need those barriers.

However, there are a few places where the barriers in use (GMMU
page table programming, IO accessors, userd) where the barrier
usage is for communicating and establishing ordering for the
GPU. We need these barriers for both SMP machines and non-SMP
machines. Therefor we must use the plain barrier versions.

Change-Id: I376129840b7dc64af8f3f23f88057e4e81360f89
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599744
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2017-11-16 11:29:11 -08:00
committed by mobile promotions
parent 3590080109
commit b7cc3a2aa6
3 changed files with 9 additions and 9 deletions
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6
drivers/gpu/nvgpu/common/linux/io.c
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@@ -26,7 +26,7 @@ void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
writel_relaxed(v, l->regs + r);
nvgpu_smp_wmb();
nvgpu_wmb();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
}
@@ -57,7 +57,7 @@ void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v)
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
nvgpu_smp_wmb();
nvgpu_wmb();
do {
writel_relaxed(v, l->regs + r);
} while (readl(l->regs + r) != v);
@@ -73,7 +73,7 @@ void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v)
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
} else {
nvgpu_smp_wmb();
nvgpu_wmb();
writel_relaxed(v, l->bar1 + b);
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
}