diff --git a/drivers/gpu/nvgpu/gk20a/fb_gk20a.c b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
index 568aed7a7..b73be02a1 100644
--- a/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
@@ -22,12 +22,20 @@
 
 static void fb_gk20a_reset(struct gk20a *g)
 {
+	u32 val;
+
 	gk20a_dbg_info("reset gk20a fb");
 
 	gk20a_reset(g, mc_enable_pfb_enabled_f()
 			| mc_enable_l2_enabled_f()
 			| mc_enable_xbar_enabled_f()
 			| mc_enable_hub_enabled_f());
+
+	val = gk20a_readl(g, mc_elpg_enable_r());
+	val |= mc_elpg_enable_xbar_enabled_f()
+		| mc_elpg_enable_pfb_enabled_f()
+		| mc_elpg_enable_hub_enabled_f();
+	gk20a_writel(g, mc_elpg_enable_r(), val);
 }
 
 static void gk20a_fb_set_mmu_page_size(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
index 97517a776..ea3c25281 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
@@ -266,4 +266,20 @@ static inline u32 mc_enable_pb_sel_f(u32 v, u32 i)
 {
 	return (v & 0x1) << (0 + i*1);
 }
+static inline u32 mc_elpg_enable_r(void)
+{
+	return 0x0000020c;
+}
+static inline u32 mc_elpg_enable_xbar_enabled_f(void)
+{
+	return 0x4;
+}
+static inline u32 mc_elpg_enable_pfb_enabled_f(void)
+{
+	return 0x100000;
+}
+static inline u32 mc_elpg_enable_hub_enabled_f(void)
+{
+	return 0x20000000;
+}
 #endif
diff --git a/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
index 3750de066..ed114e32d 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
@@ -262,4 +262,20 @@ static inline u32 mc_enable_pb_sel_f(u32 v, u32 i)
 {
 	return (v & 0x1) << (0 + i*1);
 }
+static inline u32 mc_elpg_enable_r(void)
+{
+	return 0x0000020c;
+}
+static inline u32 mc_elpg_enable_xbar_enabled_f(void)
+{
+	return 0x4;
+}
+static inline u32 mc_elpg_enable_pfb_enabled_f(void)
+{
+	return 0x100000;
+}
+static inline u32 mc_elpg_enable_hub_enabled_f(void)
+{
+	return 0x20000000;
+}
 #endif