From b83d4ed6688a362492876b2b0de6b420ed30ed0e Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Mon, 1 Aug 2022 11:29:04 -0700 Subject: [PATCH] gpu: nvgpu: fix build errors using arm toolchain - fix duplicated typedef - fix type conversion in atomics - skip unalignment check for standard build Jira HYP-12253 Signed-off-by: Richard Zhao Change-Id: I5e23e7b173bb1c8192e419cf77dd9e0ba59924b1 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2754184 Reviewed-by: svcacv Reviewed-by: Prateek Sethi Reviewed-by: Aparna Das GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h | 4 +--- drivers/gpu/nvgpu/include/nvgpu/posix/atomic.h | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/static_analysis.h | 2 +- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h index 49b9ecdf2..956c8223c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h @@ -28,6 +28,7 @@ #include #include #include +#include struct gk20a; struct pmu_payload; @@ -36,9 +37,6 @@ struct pmu_msg; struct pmu_sequence; struct falcon_payload_alloc; -typedef void (*pmu_callback)(struct gk20a *g, struct pmu_msg *msg, void *param, - u32 status); - struct pmu_cmd { struct pmu_hdr hdr; union { diff --git a/drivers/gpu/nvgpu/include/nvgpu/posix/atomic.h b/drivers/gpu/nvgpu/include/nvgpu/posix/atomic.h index 2f263fa32..3ba02b105 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/posix/atomic.h +++ b/drivers/gpu/nvgpu/include/nvgpu/posix/atomic.h @@ -93,7 +93,7 @@ typedef struct nvgpu_posix_atomic64 { \ NVGPU_COV_WHITELIST_BLOCK_BEGIN(deviate, 1, \ NVGPU_MISRA(Rule, 10_3), "TID 374") \ - tmp = (typeof((v)->v))atomic_fetch_add(&((v)->v), (i)); \ + tmp = (typeof(tmp))atomic_fetch_add(&((v)->v), (i)); \ NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 10_3)) \ tmp = __builtin_choose_expr( \ IS_SIGNED_LONG_TYPE(i), \ @@ -116,7 +116,7 @@ typedef struct nvgpu_posix_atomic64 { \ NVGPU_COV_WHITELIST_BLOCK_BEGIN(deviate, 1, \ NVGPU_MISRA(Rule, 10_3), "TID 374") \ - tmp = (typeof((v)->v))atomic_fetch_sub(&((v)->v), (i)); \ + tmp = (typeof(tmp))atomic_fetch_sub(&((v)->v), (i)); \ NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 10_3)) \ tmp = __builtin_choose_expr( \ IS_SIGNED_LONG_TYPE(i), \ diff --git a/drivers/gpu/nvgpu/include/nvgpu/static_analysis.h b/drivers/gpu/nvgpu/include/nvgpu/static_analysis.h index 60d6b9ed5..4dcff530d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/static_analysis.h +++ b/drivers/gpu/nvgpu/include/nvgpu/static_analysis.h @@ -816,7 +816,7 @@ static inline s32 nvgpu_safe_cast_s64_to_s32(s64 sl_a) * not possible, then the CERT-C violations due to unaligned access need to be * fixed. */ -#if !defined(__ARM_FEATURE_UNALIGNED) +#if defined(CONFIG_NVGPU_BUILD_CONFIGURATION_IS_SAFETY) && !defined(__ARM_FEATURE_UNALIGNED) #error "__ARM_FEATURE_UNALIGNED not defined. Check static_analysis.h" #endif