gpu: nvgpu: boardobj update for gv10x branch

- Created ops for below boardobj methods to support gp10x & gv10x
  branch boardobj changes, and defined methods for gv10x with
  postfix _v1 with below names
    boardobjgrp_pmucmd_construct_impl
    boardobjgrp_pmuset_impl
    boardobjgrp_pmugetstatus_impl
    is_boardobjgrp_pmucmd_id_valid
- These ops are assigned based on PMU version to respective
  chip.
- Modified BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT &
  BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT to support
  gp10x & gv10x branch changes
- Updated struct boardobjgrp_pmu_cmd to include members
  needed for gv10x boardobj changes
- Created "struct nv_pmu_rpc_struct_board_obj_grp_cmd"
  to execute BOARD_OBJ_GRP_CMD using RPC.
- Defined method boardobjgrp_pmucmdsend_rpc() to
  send BOARD_OBJ_GRP_CMD to PMU.

Change-Id: If2551bdda80e897e7b21d2966881586f3bbc7a9b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1656511
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2018-02-13 12:48:58 +05:30
committed by mobile promotions
parent cc4b9f540f
commit b94770dc4d
5 changed files with 319 additions and 43 deletions

View File

@@ -123,7 +123,9 @@ struct boardobjgrp_pmu_cmd {
u8 msgid;
u8 hdrsize;
u8 entrysize;
u16 fbsize;
u16 dmem_buffer_size;
u32 super_surface_offset;
u32 fbsize;
struct nv_pmu_boardobjgrp_super *buf;
struct pmu_surface surf;
};
@@ -136,6 +138,7 @@ struct boardobjgrp_pmu {
u8 unitid;
u8 classid;
bool bset;
u8 rpc_func_id;
struct boardobjgrp_pmu_cmd set;
struct boardobjgrp_pmu_cmd getstatus;
};
@@ -148,7 +151,7 @@ struct boardobjgrp_pmu {
typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid,
u8 hdrsize, u8 entrysize, u16 fbsize);
u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id);
/*
* Destroys BOARDOBJGRP PMU SW state. CMD.
@@ -296,6 +299,7 @@ struct boardobjgrp {
* are not supported.
*/
#define BOARDOBJGRP_GRP_CMD_ID_INVALID 255
#define BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID 255
/*!
* Helper macro to construct a BOARDOBJGRP's PMU SW state.
@@ -313,29 +317,33 @@ do { \
NV_PMU_##_ENG##_BOARDOBJGRP_CLASS_ID_##_CLASS; \
} while (0)
#define BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(pgpu, pboardobjgrp, eng, ENG, \
class, CLASS) \
boardobjgrp_pmucmd_construct_impl( \
pgpu, /* pgpu */ \
#define BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, eng, ENG, \
class, CLASS) \
g->ops.pmu_ver.boardobj.boardobjgrp_pmucmd_construct_impl( \
g, /* pgpu */ \
pboardobjgrp, /* pboardobjgrp */ \
&((pboardobjgrp)->pmu.set), /* pcmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_SET, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_SET, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_set_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_set_union_aligned), \
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_set))
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_set), \
(u32)offsetof(struct nv_pmu_super_surface, eng.class##_grp_set), \
NV_PMU_RPC_ID_##ENG##_BOARD_OBJ_GRP_CMD)
#define BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(pgpu, pboardobjgrp, \
eng, ENG, class, CLASS) \
boardobjgrp_pmucmd_construct_impl( \
pgpu, /* pGpu */ \
#define BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, pboardobjgrp, \
eng, ENG, class, CLASS) \
g->ops.pmu_ver.boardobj.boardobjgrp_pmucmd_construct_impl( \
g, /* pGpu */ \
pboardobjgrp, /* pBoardObjGrp */ \
&((pboardobjgrp)->pmu.getstatus), /* pCmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_GET_STATUS, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_GET_STATUS, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_get_status_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_get_status_union_aligned), \
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_get_status))
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_get_status), \
(u32)offsetof(struct nv_pmu_super_surface, eng.class##_grp_get_status), \
NV_PMU_RPC_ID_##ENG##_BOARD_OBJ_GRP_CMD)
/* ------------------------ Function Prototypes ----------------------------- */
/* Constructor and destructor */
@@ -348,6 +356,8 @@ boardobjgrp_pmucmd_construct boardobjgrp_pmucmd_construct_impl;
boardobjgrp_pmucmd_destroy boardobjgrp_pmucmd_destroy_impl;
boardobjgrp_pmucmd_pmuinithandle boardobjgrp_pmucmd_pmuinithandle_impl;
boardobjgrp_pmucmd_construct boardobjgrp_pmucmd_construct_impl_v1;
/* BOARDOBJGRP interfaces */
boardobjgrp_pmuinithandle boardobjgrp_pmuinithandle_impl;
boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_super;
@@ -356,6 +366,8 @@ boardobjgrp_pmudatainit boardobjgrp_pmudatainit_super;
boardobjgrp_pmudatainit boardobjgrp_pmudatainit_legacy;
boardobjgrp_pmuset boardobjgrp_pmuset_impl;
boardobjgrp_pmugetstatus boardobjgrp_pmugetstatus_impl;
boardobjgrp_pmuset boardobjgrp_pmuset_impl_v1;
boardobjgrp_pmugetstatus boardobjgrp_pmugetstatus_impl_v1;
void boardobjgrpe32hdrset(struct nv_pmu_boardobjgrp *hdr, u32 objmask);
@@ -413,4 +425,10 @@ boardobjgrp_from_node(struct nvgpu_list_node *node)
((uintptr_t)node - offsetof(struct boardobjgrp, node));
};
int is_boardobjgrp_pmucmd_id_valid_v0(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd);
int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd);
#endif