From b947c8ea7b402ae80292b281c0fa8ba3fda205df Mon Sep 17 00:00:00 2001 From: Vaikundanathan S Date: Tue, 1 Jan 2019 11:40:24 +0530 Subject: [PATCH] gpu:nvgpu: Setup initial values for clk_pos. clk_pos should be 0 for master JIRA NVGPU-1150 Change-Id: I2d17e479bdf4754f85b8db33b2f1e647e582d5ed Signed-off-by: Vaikundanathan S Reviewed-on: https://git-master.nvidia.com/r/1985169 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Abdul Salam Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/clk/clk_domain.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c index 504c70fff..099a38bd2 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.c +++ b/drivers/gpu/nvgpu/clk/clk_domain.c @@ -316,6 +316,8 @@ int clk_domain_sw_setup(struct gk20a *g) (CLK_CLK_DOMAIN_GET((g->clk_pmu), pdomain_slave_35->slave.master_idx)); pdomain_master_35->master.slave_idxs_mask |= BIT(i); + pdomain_slave_35->super.clk_pos = boardobjgrpmask_bitsetcount( + &pdomain_master_35->master_slave_domains_grp_mask.super); status = boardobjgrpmask_bitset( &pdomain_master_35->master_slave_domains_grp_mask.super, i); if (status != 0) { @@ -1562,6 +1564,7 @@ static int clk_domain_construct_35_master(struct gk20a *g, clkdomainclkproglink_3x_master; pdomain->master.slave_idxs_mask = 0; + pdomain->super.clk_pos = 0; boardobjgrpmask_e32_init(&pdomain->master_slave_domains_grp_mask, NULL);