From ba5d129cfccf7ea7432b0c88739b1194e786c2e1 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Wed, 25 Sep 2019 11:36:11 +0530 Subject: [PATCH] gpu: nvgpu: address CCM for nvgpu_cg_init_gr_load_gating_prod Reduced TCC/MCC below 10 by splitting into BLCG and SLPC load gating prod functions. JIRA NVGPU-4101 Change-Id: Ic572e1fe4dd6a3a1edf13d77ddadf08ea2214f74 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2205216 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- .../gpu/nvgpu/common/power_features/cg/cg.c | 38 ++++++++++++------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/nvgpu/common/power_features/cg/cg.c b/drivers/gpu/nvgpu/common/power_features/cg/cg.c index 5c9d796d8..26b147870 100644 --- a/drivers/gpu/nvgpu/common/power_features/cg/cg.c +++ b/drivers/gpu/nvgpu/common/power_features/cg/cg.c @@ -240,16 +240,8 @@ done: nvgpu_mutex_release(&g->cg_pg_lock); } -void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g) +static void cg_init_gr_slcg_load_gating_prod(struct gk20a *g) { - nvgpu_log_fn(g, " "); - - nvgpu_mutex_acquire(&g->cg_pg_lock); - - if (!g->slcg_enabled) { - goto check_can_blcg; - } - if (g->ops.cg.slcg_bus_load_gating_prod != NULL) { g->ops.cg.slcg_bus_load_gating_prod(g, true); } @@ -272,11 +264,10 @@ void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g) if (g->ops.cg.slcg_hshub_load_gating_prod != NULL) { g->ops.cg.slcg_hshub_load_gating_prod(g, true); } +} -check_can_blcg: - if (!g->blcg_enabled) { - goto pg_gr_load; - } +static void cg_init_gr_blcg_load_gating_prod(struct gk20a *g) +{ if (g->ops.cg.blcg_bus_load_gating_prod != NULL) { g->ops.cg.blcg_bus_load_gating_prod(g, true); } @@ -293,6 +284,27 @@ check_can_blcg: if (g->ops.cg.blcg_hshub_load_gating_prod != NULL) { g->ops.cg.blcg_hshub_load_gating_prod(g, true); } +} + +void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g) +{ + nvgpu_log_fn(g, " "); + + nvgpu_mutex_acquire(&g->cg_pg_lock); + + if (!g->slcg_enabled) { + goto check_can_blcg; + } + + cg_init_gr_slcg_load_gating_prod(g); + +check_can_blcg: + if (!g->blcg_enabled) { + goto pg_gr_load; + } + + cg_init_gr_blcg_load_gating_prod(g); + pg_gr_load: if (g->ops.cg.pg_gr_load_gating_prod != NULL) { g->ops.cg.pg_gr_load_gating_prod(g, true);