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gpu: nvgpu: Use accessor for finding struct device

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Use dev_from_gk20a() accessor whenever accessing struct device * from
struct gk20a.

JIRA NVGPU-38

Change-Id: Ide9fca3a56436c8f62e7872580a766c4c1e2353e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master/r/1507930
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Terje Bergstrom
2017-06-21 15:56:05 -07:00
committed by mobile promotions
parent 6f0fcbc667
commit bab823973b
43 changed files with 105 additions and 90 deletions
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2
drivers/gpu/nvgpu/clk/clk_arb.c
View File

@@ -2076,7 +2076,7 @@ static const struct file_operations nvgpu_clk_arb_stats_fops = {
static int nvgpu_clk_arb_debugfs_init(struct gk20a *g) static int nvgpu_clk_arb_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *gpu_root = platform->debugfs; struct dentry *gpu_root = platform->debugfs;
struct dentry *d; struct dentry *d;

4
drivers/gpu/nvgpu/common/linux/clk.c
View File

@@ -27,7 +27,7 @@
static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain) static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain)
{ {
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
unsigned long ret; unsigned long ret;
switch (api_domain) { switch (api_domain) {
@@ -52,7 +52,7 @@ static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain)
static int nvgpu_linux_clk_set_rate(struct gk20a *g, static int nvgpu_linux_clk_set_rate(struct gk20a *g,
u32 api_domain, unsigned long rate) u32 api_domain, unsigned long rate)
{ {
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
int ret; int ret;
switch (api_domain) { switch (api_domain) {

14
drivers/gpu/nvgpu/common/linux/debug.c
View File

@@ -101,13 +101,13 @@ static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
void gk20a_debug_dump(struct gk20a *g) void gk20a_debug_dump(struct gk20a *g)
{ {
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
struct gk20a_debug_output o = { struct gk20a_debug_output o = {
.fn = gk20a_debug_write_printk .fn = gk20a_debug_write_printk
}; };
if (platform->dump_platform_dependencies) if (platform->dump_platform_dependencies)
platform->dump_platform_dependencies(g->dev); platform->dump_platform_dependencies(dev_from_gk20a(g));
/* HAL only initialized after 1st power-on */ /* HAL only initialized after 1st power-on */
if (g->ops.debug.show_dump) if (g->ops.debug.show_dump)
@@ -180,12 +180,12 @@ void gk20a_init_debug_ops(struct gpu_ops *gops)
static int railgate_residency_show(struct seq_file *s, void *data) static int railgate_residency_show(struct seq_file *s, void *data)
{ {
struct gk20a *g = s->private; struct gk20a *g = s->private;
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
unsigned long time_since_last_state_transition_ms; unsigned long time_since_last_state_transition_ms;
unsigned long total_rail_gate_time_ms; unsigned long total_rail_gate_time_ms;
unsigned long total_rail_ungate_time_ms; unsigned long total_rail_ungate_time_ms;
if (platform->is_railgated(g->dev)) { if (platform->is_railgated(dev_from_gk20a(g))) {
time_since_last_state_transition_ms = time_since_last_state_transition_ms =
jiffies_to_msecs(jiffies - jiffies_to_msecs(jiffies -
g->pstats.last_rail_gate_complete); g->pstats.last_rail_gate_complete);
@@ -227,7 +227,7 @@ static const struct file_operations railgate_residency_fops = {
static int gk20a_railgating_debugfs_init(struct gk20a *g) static int gk20a_railgating_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *d; struct dentry *d;
if (!g->can_railgate) if (!g->can_railgate)
@@ -244,7 +244,7 @@ static int gk20a_railgating_debugfs_init(struct gk20a *g)
void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink) void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev); struct gk20a_platform *platform = dev_get_drvdata(dev);
platform->debugfs = debugfs_create_dir(dev_name(dev), NULL); platform->debugfs = debugfs_create_dir(dev_name(dev), NULL);
@@ -364,7 +364,7 @@ void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink)
void gk20a_debug_deinit(struct gk20a *g) void gk20a_debug_deinit(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
if (!platform->debugfs) if (!platform->debugfs)
return; return;

2
drivers/gpu/nvgpu/common/linux/debug_allocator.c
View File

@@ -67,7 +67,7 @@ void nvgpu_fini_alloc_debug(struct nvgpu_allocator *a)
void nvgpu_alloc_debugfs_init(struct gk20a *g) void nvgpu_alloc_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
g->debugfs_allocators = debugfs_create_dir("allocators", platform->debugfs); g->debugfs_allocators = debugfs_create_dir("allocators", platform->debugfs);
if (IS_ERR_OR_NULL(g->debugfs_allocators)) { if (IS_ERR_OR_NULL(g->debugfs_allocators)) {

2
drivers/gpu/nvgpu/common/linux/debug_cde.c
View File

@@ -33,7 +33,7 @@ static const struct file_operations gk20a_cde_reload_fops = {
void gk20a_cde_debugfs_init(struct gk20a *g) void gk20a_cde_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
if (!platform->has_cde) if (!platform->has_cde)
return; return;

2
drivers/gpu/nvgpu/common/linux/debug_ce.c
View File

@@ -19,7 +19,7 @@
void gk20a_ce_debugfs_init(struct gk20a *g) void gk20a_ce_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
debugfs_create_u32("ce_app_ctx_count", S_IWUSR | S_IRUGO, debugfs_create_u32("ce_app_ctx_count", S_IWUSR | S_IRUGO,
platform->debugfs, &g->ce_app.ctx_count); platform->debugfs, &g->ce_app.ctx_count);

2
drivers/gpu/nvgpu/common/linux/debug_clk.c
View File

@@ -217,7 +217,7 @@ static const struct file_operations pll_param_fops = {
int gm20b_clk_init_debugfs(struct gk20a *g) int gm20b_clk_init_debugfs(struct gk20a *g)
{ {
struct dentry *d; struct dentry *d;
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
if (!platform->debugfs) if (!platform->debugfs)
return -EINVAL; return -EINVAL;

2
drivers/gpu/nvgpu/common/linux/debug_fifo.c
View File

@@ -291,7 +291,7 @@ static const struct file_operations gk20a_fifo_profile_stats_debugfs_fops = {
void gk20a_fifo_debugfs_init(struct gk20a *g) void gk20a_fifo_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *gpu_root = platform->debugfs; struct dentry *gpu_root = platform->debugfs;
struct dentry *fifo_root; struct dentry *fifo_root;

2
drivers/gpu/nvgpu/common/linux/debug_gr.c
View File

@@ -19,7 +19,7 @@
int gr_gk20a_debugfs_init(struct gk20a *g) int gr_gk20a_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
g->debugfs_gr_default_attrib_cb_size = g->debugfs_gr_default_attrib_cb_size =
debugfs_create_u32("gr_default_attrib_cb_size", debugfs_create_u32("gr_default_attrib_cb_size",

2
drivers/gpu/nvgpu/common/linux/debug_kmem.c
View File

@@ -295,7 +295,7 @@ static const struct file_operations __kmem_traces_fops = {
void nvgpu_kmem_debugfs_init(struct gk20a *g) void nvgpu_kmem_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *node; struct dentry *node;
g->debugfs_kmem = debugfs_create_dir("kmem_tracking", platform->debugfs); g->debugfs_kmem = debugfs_create_dir("kmem_tracking", platform->debugfs);

2
drivers/gpu/nvgpu/common/linux/debug_mm.c
View File

@@ -19,7 +19,7 @@
void gk20a_mm_debugfs_init(struct gk20a *g) void gk20a_mm_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
debugfs_create_bool("force_pramin", 0664, platform->debugfs, debugfs_create_bool("force_pramin", 0664, platform->debugfs,
&g->mm.force_pramin); &g->mm.force_pramin);

2
drivers/gpu/nvgpu/common/linux/debug_pmu.c
View File

@@ -416,7 +416,7 @@ static const struct file_operations security_fops = {
int gk20a_pmu_debugfs_init(struct gk20a *g) int gk20a_pmu_debugfs_init(struct gk20a *g)
{ {
struct dentry *d; struct dentry *d;
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
d = debugfs_create_file( d = debugfs_create_file(
"lpwr_debug", S_IRUGO|S_IWUSR, platform->debugfs, g, "lpwr_debug", S_IRUGO|S_IWUSR, platform->debugfs, g,

2
drivers/gpu/nvgpu/common/linux/debug_sched.c
View File

@@ -72,7 +72,7 @@ static const struct file_operations gk20a_sched_debugfs_fops = {
void gk20a_sched_debugfs_init(struct gk20a *g) void gk20a_sched_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
debugfs_create_file("sched_ctrl", S_IRUGO, platform->debugfs, debugfs_create_file("sched_ctrl", S_IRUGO, platform->debugfs,
g, &gk20a_sched_debugfs_fops); g, &gk20a_sched_debugfs_fops);

28
drivers/gpu/nvgpu/common/linux/driver_common.c
View File

@@ -35,7 +35,8 @@
static void nvgpu_init_vars(struct gk20a *g) static void nvgpu_init_vars(struct gk20a *g)
{ {
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev);
init_waitqueue_head(&g->sw_irq_stall_last_handled_wq); init_waitqueue_head(&g->sw_irq_stall_last_handled_wq);
init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq); init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq);
@@ -57,8 +58,8 @@ static void nvgpu_init_vars(struct gk20a *g)
g->emc3d_ratio = EMC3D_DEFAULT_RATIO; g->emc3d_ratio = EMC3D_DEFAULT_RATIO;
/* Set DMA parameters to allow larger sgt lists */ /* Set DMA parameters to allow larger sgt lists */
g->dev->dma_parms = &l->dma_parms; dev->dma_parms = &l->dma_parms;
dma_set_max_seg_size(g->dev, UINT_MAX); dma_set_max_seg_size(dev, UINT_MAX);
nvgpu_init_list_node(&g->pending_sema_waits); nvgpu_init_list_node(&g->pending_sema_waits);
nvgpu_raw_spinlock_init(&g->pending_sema_waits_lock); nvgpu_raw_spinlock_init(&g->pending_sema_waits_lock);
@@ -68,7 +69,7 @@ static void nvgpu_init_vars(struct gk20a *g)
static void nvgpu_init_timeout(struct gk20a *g) static void nvgpu_init_timeout(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT; g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT;
if (nvgpu_platform_is_silicon(g)) if (nvgpu_platform_is_silicon(g))
@@ -94,7 +95,7 @@ static void nvgpu_init_timeslice(struct gk20a *g)
static void nvgpu_init_pm_vars(struct gk20a *g) static void nvgpu_init_pm_vars(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
/* /*
* Set up initial power settings. For non-slicon platforms, disable * Set up initial power settings. For non-slicon platforms, disable
@@ -119,7 +120,7 @@ static void nvgpu_init_pm_vars(struct gk20a *g)
g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh; g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
g->has_syncpoints = platform->has_syncpoints; g->has_syncpoints = platform->has_syncpoints;
g->ptimer_src_freq = platform->ptimer_src_freq; g->ptimer_src_freq = platform->ptimer_src_freq;
g->support_pmu = support_gk20a_pmu(g->dev); g->support_pmu = support_gk20a_pmu(dev_from_gk20a(g));
g->can_railgate = platform->can_railgate_init; g->can_railgate = platform->can_railgate_init;
g->railgate_delay = platform->railgate_delay_init; g->railgate_delay = platform->railgate_delay_init;
@@ -133,7 +134,7 @@ static void nvgpu_init_pm_vars(struct gk20a *g)
static void nvgpu_init_mm_vars(struct gk20a *g) static void nvgpu_init_mm_vars(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
g->mm.bypass_smmu = platform->bypass_smmu; g->mm.bypass_smmu = platform->bypass_smmu;
g->mm.disable_bigpage = platform->disable_bigpage; g->mm.disable_bigpage = platform->disable_bigpage;
@@ -153,7 +154,8 @@ int nvgpu_probe(struct gk20a *g,
const char *interface_name, const char *interface_name,
struct class *class) struct class *class)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev);
int err = 0; int err = 0;
nvgpu_init_vars(g); nvgpu_init_vars(g);
@@ -162,7 +164,7 @@ int nvgpu_probe(struct gk20a *g,
nvgpu_init_pm_vars(g); nvgpu_init_pm_vars(g);
/* Initialize the platform interface. */ /* Initialize the platform interface. */
err = platform->probe(g->dev); err = platform->probe(dev);
if (err) { if (err) {
if (err == -EPROBE_DEFER) if (err == -EPROBE_DEFER)
nvgpu_info(g, "platform probe failed"); nvgpu_info(g, "platform probe failed");
@@ -172,17 +174,17 @@ int nvgpu_probe(struct gk20a *g,
} }
/* platform probe can defer do user init only if probe succeeds */ /* platform probe can defer do user init only if probe succeeds */
err = gk20a_user_init(g->dev, interface_name, class); err = gk20a_user_init(dev, interface_name, class);
if (err) if (err)
return err; return err;
/* Initialise scaling */ /* Initialise scaling */
if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) if (IS_ENABLED(CONFIG_GK20A_DEVFREQ))
gk20a_scale_init(g->dev); gk20a_scale_init(dev);
if (platform->late_probe) { if (platform->late_probe) {
err = platform->late_probe(g->dev); err = platform->late_probe(dev);
if (err) { if (err) {
nvgpu_err(g, "late probe failed"); nvgpu_err(g, "late probe failed");
return err; return err;
@@ -191,7 +193,7 @@ int nvgpu_probe(struct gk20a *g,
nvgpu_init_mm_vars(g); nvgpu_init_mm_vars(g);
nvgpu_create_sysfs(g->dev); nvgpu_create_sysfs(dev);
gk20a_debug_init(g, debugfs_symlink); gk20a_debug_init(g, debugfs_symlink);
g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K); g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K);

2
drivers/gpu/nvgpu/common/linux/firmware.c
View File

@@ -65,7 +65,7 @@ struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g,
const char *fw_name, const char *fw_name,
int flags) int flags)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct nvgpu_firmware *fw; struct nvgpu_firmware *fw;
const struct firmware *linux_fw; const struct firmware *linux_fw;

9
drivers/gpu/nvgpu/common/linux/ioctl_channel.c
View File

@@ -32,6 +32,7 @@
#include "gk20a/ctxsw_trace_gk20a.h" #include "gk20a/ctxsw_trace_gk20a.h"
#include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h"
#include "gk20a/fence_gk20a.h" #include "gk20a/fence_gk20a.h"
#include "gk20a/platform_gk20a.h"
#include "ioctl_channel.h" #include "ioctl_channel.h"
#include "os_linux.h" #include "os_linux.h"
@@ -291,7 +292,7 @@ int gk20a_channel_release(struct inode *inode, struct file *filp)
goto channel_release; goto channel_release;
} }
trace_gk20a_channel_release(dev_name(g->dev)); trace_gk20a_channel_release(dev_name(dev_from_gk20a(g)));
gk20a_channel_close(ch); gk20a_channel_close(ch);
gk20a_channel_free_error_notifiers(ch); gk20a_channel_free_error_notifiers(ch);
@@ -319,7 +320,7 @@ static int __gk20a_channel_open(struct gk20a *g,
if (!g) if (!g)
return -ENODEV; return -ENODEV;
trace_gk20a_channel_open(dev_name(g->dev)); trace_gk20a_channel_open(dev_name(dev_from_gk20a(g)));
priv = nvgpu_kzalloc(g, sizeof(*priv)); priv = nvgpu_kzalloc(g, sizeof(*priv));
if (!priv) { if (!priv) {
@@ -388,7 +389,7 @@ int gk20a_channel_open_ioctl(struct gk20a *g,
fd = err; fd = err;
snprintf(name, sizeof(name), "nvhost-%s-fd%d", snprintf(name, sizeof(name), "nvhost-%s-fd%d",
dev_name(g->dev), fd); dev_name(dev_from_gk20a(g)), fd);
file = anon_inode_getfile(name, l->channel.cdev.ops, NULL, O_RDWR); file = anon_inode_getfile(name, l->channel.cdev.ops, NULL, O_RDWR);
if (IS_ERR(file)) { if (IS_ERR(file)) {
@@ -841,7 +842,7 @@ long gk20a_channel_ioctl(struct file *filp,
{ {
struct channel_priv *priv = filp->private_data; struct channel_priv *priv = filp->private_data;
struct channel_gk20a *ch = priv->c; struct channel_gk20a *ch = priv->c;
struct device *dev = ch->g->dev; struct device *dev = dev_from_gk20a(ch->g);
u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0}; u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0};
int err = 0; int err = 0;

2
drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
View File

@@ -68,7 +68,7 @@ int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
goto free_ref; goto free_ref;
} }
filp->private_data = priv; filp->private_data = priv;
priv->dev = g->dev; priv->dev = dev_from_gk20a(g);
/* /*
* We dont close the arbiter fd's after driver teardown to support * We dont close the arbiter fd's after driver teardown to support
* GPU_LOST events, so we store g here, instead of dereferencing the * GPU_LOST events, so we store g here, instead of dereferencing the

3
drivers/gpu/nvgpu/common/linux/log.c
View File

@@ -20,6 +20,7 @@
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/platform_gk20a.h"
/* /*
* Define a length for log buffers. This is the buffer that the 'fmt, ...' part * Define a length for log buffers. This is the buffer that the 'fmt, ...' part
@@ -52,7 +53,7 @@ int nvgpu_log_mask_enabled(struct gk20a *g, u32 log_mask)
static inline const char *nvgpu_log_name(struct gk20a *g) static inline const char *nvgpu_log_name(struct gk20a *g)
{ {
return dev_name(g->dev); return dev_name(dev_from_gk20a(g));
} }
#ifdef CONFIG_GK20A_TRACE_PRINTK #ifdef CONFIG_GK20A_TRACE_PRINTK

10
drivers/gpu/nvgpu/common/linux/module.c
View File

@@ -78,7 +78,7 @@ int gk20a_busy(struct gk20a *g)
goto fail; goto fail;
} }
dev = g->dev; dev = dev_from_gk20a(g);
if (pm_runtime_enabled(dev)) { if (pm_runtime_enabled(dev)) {
ret = pm_runtime_get_sync(dev); ret = pm_runtime_get_sync(dev);
@@ -116,7 +116,7 @@ void gk20a_idle(struct gk20a *g)
atomic_dec(&g->usage_count); atomic_dec(&g->usage_count);
dev = g->dev; dev = dev_from_gk20a(g);
if (!(dev && gk20a_can_busy(g))) if (!(dev && gk20a_can_busy(g)))
return; return;
@@ -175,7 +175,7 @@ int gk20a_pm_finalize_poweron(struct device *dev)
enable_irq(g->irq_nonstall); enable_irq(g->irq_nonstall);
g->irqs_enabled = 1; g->irqs_enabled = 1;
gk20a_scale_resume(g->dev); gk20a_scale_resume(dev_from_gk20a(g));
if (platform->has_cde) if (platform->has_cde)
gk20a_init_cde_support(g); gk20a_init_cde_support(g);
@@ -269,7 +269,7 @@ static struct of_device_id tegra_gk20a_of_match[] = {
*/ */
int __gk20a_do_idle(struct gk20a *g, bool force_reset) int __gk20a_do_idle(struct gk20a *g, bool force_reset)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev); struct gk20a_platform *platform = dev_get_drvdata(dev);
struct nvgpu_timeout timeout; struct nvgpu_timeout timeout;
int ref_cnt; int ref_cnt;
@@ -410,7 +410,7 @@ static int gk20a_do_idle(void *_g)
*/ */
int __gk20a_do_unidle(struct gk20a *g) int __gk20a_do_unidle(struct gk20a *g)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev); struct gk20a_platform *platform = dev_get_drvdata(dev);
int err; int err;

7
drivers/gpu/nvgpu/common/linux/nvhost.c
View File

@@ -23,10 +23,11 @@
#include "nvhost_priv.h" #include "nvhost_priv.h"
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/platform_gk20a.h"
int nvgpu_get_nvhost_dev(struct gk20a *g) int nvgpu_get_nvhost_dev(struct gk20a *g)
{ {
struct device_node *np = g->dev->of_node; struct device_node *np = dev_from_gk20a(g)->of_node;
struct platform_device *host1x_pdev = NULL; struct platform_device *host1x_pdev = NULL;
const __be32 *host1x_ptr; const __be32 *host1x_ptr;
@@ -151,7 +152,7 @@ int nvgpu_nvhost_syncpt_read_ext_check(
int nvgpu_nvhost_create_symlink(struct gk20a *g) int nvgpu_nvhost_create_symlink(struct gk20a *g)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
int err = 0; int err = 0;
if (g->nvhost_dev && if (g->nvhost_dev &&
@@ -166,7 +167,7 @@ int nvgpu_nvhost_create_symlink(struct gk20a *g)
void nvgpu_nvhost_remove_symlink(struct gk20a *g) void nvgpu_nvhost_remove_symlink(struct gk20a *g)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
if (g->nvhost_dev && if (g->nvhost_dev &&
(dev->parent != &g->nvhost_dev->host1x_pdev->dev)) { (dev->parent != &g->nvhost_dev->host1x_pdev->dev)) {

6
drivers/gpu/nvgpu/common/linux/pci.c
View File

@@ -469,7 +469,7 @@ static void nvgpu_pci_remove(struct pci_dev *pdev)
nvgpu_clk_arb_cleanup_arbiter(g); nvgpu_clk_arb_cleanup_arbiter(g);
#endif #endif
gk20a_user_deinit(g->dev, &nvgpu_pci_class); gk20a_user_deinit(dev_from_gk20a(g), &nvgpu_pci_class);
gk20a_dbg(gpu_dbg_shutdown, "User de-init done.\b"); gk20a_dbg(gpu_dbg_shutdown, "User de-init done.\b");
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS
@@ -477,10 +477,10 @@ static void nvgpu_pci_remove(struct pci_dev *pdev)
debugfs_remove_recursive(platform->debugfs_alias); debugfs_remove_recursive(platform->debugfs_alias);
#endif #endif
nvgpu_remove_sysfs(g->dev); nvgpu_remove_sysfs(dev_from_gk20a(g));
if (platform->remove) if (platform->remove)
platform->remove(g->dev); platform->remove(dev_from_gk20a(g));
gk20a_dbg(gpu_dbg_shutdown, "Platform remove done.\b"); gk20a_dbg(gpu_dbg_shutdown, "Platform remove done.\b");
enable_irq(g->irq_stall); enable_irq(g->irq_stall);

2
drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c
View File

@@ -760,7 +760,7 @@ static int gm20b_register_gpcclk(struct gk20a *g)
/* Data in .init is copied by clk_register(), so stack variable OK */ /* Data in .init is copied by clk_register(), so stack variable OK */
clk->hw.init = &init; clk->hw.init = &init;
c = clk_register(g->dev, &clk->hw); c = clk_register(dev_from_gk20a(g), &clk->hw);
if (IS_ERR(c)) { if (IS_ERR(c)) {
nvgpu_err(g, "Failed to register GPCPLL clock"); nvgpu_err(g, "Failed to register GPCPLL clock");
return -EINVAL; return -EINVAL;

2
drivers/gpu/nvgpu/common/linux/sysfs.c
View File

@@ -388,7 +388,7 @@ static ssize_t is_railgated_show(struct device *dev,
bool is_railgated = 0; bool is_railgated = 0;
if (platform->is_railgated) if (platform->is_railgated)
is_railgated = platform->is_railgated(platform->g->dev); is_railgated = platform->is_railgated(dev);
return snprintf(buf, PAGE_SIZE, "%s\n", is_railgated ? "yes" : "no"); return snprintf(buf, PAGE_SIZE, "%s\n", is_railgated ? "yes" : "no");
} }

14
drivers/gpu/nvgpu/common/linux/vm.c
View File

@@ -26,6 +26,7 @@
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h" #include "gk20a/mm_gk20a.h"
#include "gk20a/kind_gk20a.h" #include "gk20a/kind_gk20a.h"
#include "gk20a/platform_gk20a.h"
#include "vm_priv.h" #include "vm_priv.h"
@@ -187,6 +188,7 @@ u64 nvgpu_vm_map(struct vm_gk20a *vm,
struct vm_gk20a_mapping_batch *batch) struct vm_gk20a_mapping_batch *batch)
{ {
struct gk20a *g = gk20a_from_vm(vm); struct gk20a *g = gk20a_from_vm(vm);
struct device *dev = dev_from_gk20a(g);
struct gk20a_comptag_allocator *ctag_allocator = &g->gr.comp_tags; struct gk20a_comptag_allocator *ctag_allocator = &g->gr.comp_tags;
struct nvgpu_mapped_buf *mapped_buffer = NULL; struct nvgpu_mapped_buf *mapped_buffer = NULL;
bool va_allocated = false; bool va_allocated = false;
@@ -224,7 +226,7 @@ u64 nvgpu_vm_map(struct vm_gk20a *vm,
} }
/* pin buffer to get phys/iovmm addr */ /* pin buffer to get phys/iovmm addr */
bfr.sgt = gk20a_mm_pin(g->dev, dmabuf); bfr.sgt = gk20a_mm_pin(dev, dmabuf);
if (IS_ERR(bfr.sgt)) { if (IS_ERR(bfr.sgt)) {
/* Falling back to physical is actually possible /* Falling back to physical is actually possible
* here in many cases if we use 4K phys pages in the * here in many cases if we use 4K phys pages in the
@@ -283,7 +285,7 @@ u64 nvgpu_vm_map(struct vm_gk20a *vm,
if (!vm->enable_ctag) if (!vm->enable_ctag)
bfr.ctag_lines = 0; bfr.ctag_lines = 0;
gk20a_get_comptags(g->dev, dmabuf, &comptags); gk20a_get_comptags(dev, dmabuf, &comptags);
/* ensure alignment to compression page size if compression enabled */ /* ensure alignment to compression page size if compression enabled */
if (bfr.ctag_offset) if (bfr.ctag_offset)
@@ -295,7 +297,8 @@ u64 nvgpu_vm_map(struct vm_gk20a *vm,
!!(flags & NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS); !!(flags & NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS);
/* allocate compression resources if needed */ /* allocate compression resources if needed */
err = gk20a_alloc_comptags(g, g->dev, dmabuf, ctag_allocator, err = gk20a_alloc_comptags(g, dev, dmabuf,
ctag_allocator,
bfr.ctag_lines, user_mappable, bfr.ctag_lines, user_mappable,
&ctag_map_win_size, &ctag_map_win_size,
&ctag_map_win_ctagline); &ctag_map_win_ctagline);
@@ -304,7 +307,8 @@ u64 nvgpu_vm_map(struct vm_gk20a *vm,
/* TBD: we can partially alloc ctags as well... */ /* TBD: we can partially alloc ctags as well... */
bfr.kind_v = bfr.uc_kind_v; bfr.kind_v = bfr.uc_kind_v;
} else { } else {
gk20a_get_comptags(g->dev, dmabuf, &comptags); gk20a_get_comptags(dev,
dmabuf, &comptags);
if (g->ops.ltc.cbc_ctrl) if (g->ops.ltc.cbc_ctrl)
g->ops.ltc.cbc_ctrl(g, gk20a_cbc_op_clear, g->ops.ltc.cbc_ctrl(g, gk20a_cbc_op_clear,
@@ -396,7 +400,7 @@ clean_up:
if (va_allocated) if (va_allocated)
__nvgpu_vm_free_va(vm, map_offset, bfr.pgsz_idx); __nvgpu_vm_free_va(vm, map_offset, bfr.pgsz_idx);
if (!IS_ERR(bfr.sgt)) if (!IS_ERR(bfr.sgt))
gk20a_mm_unpin(g->dev, dmabuf, bfr.sgt); gk20a_mm_unpin(dev, dmabuf, bfr.sgt);
nvgpu_mutex_release(&vm->update_gmmu_lock); nvgpu_mutex_release(&vm->update_gmmu_lock);
nvgpu_log_info(g, "err=%d", err); nvgpu_log_info(g, "err=%d", err);

12
drivers/gpu/nvgpu/gk20a/cde_gk20a.c
View File

@@ -37,6 +37,7 @@
#include "cde_gk20a.h" #include "cde_gk20a.h"
#include "fence_gk20a.h" #include "fence_gk20a.h"
#include "gr_gk20a.h" #include "gr_gk20a.h"
#include "platform_gk20a.h"
#include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h> #include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h>
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h> #include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
@@ -915,7 +916,7 @@ static struct gk20a_cde_ctx *gk20a_cde_allocate_context(struct gk20a *g)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
cde_ctx->g = g; cde_ctx->g = g;
cde_ctx->dev = g->dev; cde_ctx->dev = dev_from_gk20a(g);
ret = gk20a_cde_load(cde_ctx); ret = gk20a_cde_load(cde_ctx);
if (ret) { if (ret) {
@@ -982,7 +983,8 @@ __releases(&cde_app->mutex)
/* First, map the buffer to local va */ /* First, map the buffer to local va */
/* ensure that the compbits buffer has drvdata */ /* ensure that the compbits buffer has drvdata */
err = gk20a_dmabuf_alloc_drvdata(compbits_scatter_buf, g->dev); err = gk20a_dmabuf_alloc_drvdata(compbits_scatter_buf,
dev_from_gk20a(g));
if (err) if (err)
goto exit_idle; goto exit_idle;
@@ -1048,7 +1050,7 @@ __releases(&cde_app->mutex)
gk20a_dbg(gpu_dbg_cde, "surface=0x%p scatterBuffer=0x%p", gk20a_dbg(gpu_dbg_cde, "surface=0x%p scatterBuffer=0x%p",
surface, scatter_buffer); surface, scatter_buffer);
sgt = gk20a_mm_pin(g->dev, compbits_scatter_buf); sgt = gk20a_mm_pin(dev_from_gk20a(g), compbits_scatter_buf);
if (IS_ERR(sgt)) { if (IS_ERR(sgt)) {
nvgpu_warn(g, nvgpu_warn(g,
"mm_pin failed"); "mm_pin failed");
@@ -1060,7 +1062,7 @@ __releases(&cde_app->mutex)
scatterbuffer_size); scatterbuffer_size);
WARN_ON(err); WARN_ON(err);
gk20a_mm_unpin(g->dev, compbits_scatter_buf, gk20a_mm_unpin(dev_from_gk20a(g), compbits_scatter_buf,
sgt); sgt);
if (err) if (err)
goto exit_unmap_surface; goto exit_unmap_surface;
@@ -1072,7 +1074,7 @@ __releases(&cde_app->mutex)
} }
/* store source buffer compression tags */ /* store source buffer compression tags */
gk20a_get_comptags(g->dev, compbits_scatter_buf, &comptags); gk20a_get_comptags(dev_from_gk20a(g), compbits_scatter_buf, &comptags);
cde_ctx->surf_param_offset = comptags.offset; cde_ctx->surf_param_offset = comptags.offset;
cde_ctx->surf_param_lines = comptags.lines; cde_ctx->surf_param_lines = comptags.lines;

2
drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
View File

@@ -134,7 +134,7 @@ static int gk20a_dbg_gpu_do_dev_open(struct inode *inode,
if (!g) if (!g)
return -ENODEV; return -ENODEV;
dev = g->dev; dev = dev_from_gk20a(g);
gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "dbg session: %s", g->name); gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "dbg session: %s", g->name);

4
drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
View File

@@ -536,7 +536,7 @@ DEFINE_SIMPLE_ATTRIBUTE(gk20a_fecs_trace_debugfs_write_fops,
static void gk20a_fecs_trace_debugfs_init(struct gk20a *g) static void gk20a_fecs_trace_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *plat = dev_get_drvdata(g->dev); struct gk20a_platform *plat = dev_get_drvdata(dev_from_gk20a(g));
debugfs_create_file("ctxsw_trace_read", 0600, plat->debugfs, g, debugfs_create_file("ctxsw_trace_read", 0600, plat->debugfs, g,
&gk20a_fecs_trace_debugfs_read_fops); &gk20a_fecs_trace_debugfs_read_fops);
@@ -548,7 +548,7 @@ static void gk20a_fecs_trace_debugfs_init(struct gk20a *g)
static void gk20a_fecs_trace_debugfs_cleanup(struct gk20a *g) static void gk20a_fecs_trace_debugfs_cleanup(struct gk20a *g)
{ {
struct gk20a_platform *plat = dev_get_drvdata(g->dev); struct gk20a_platform *plat = dev_get_drvdata(dev_from_gk20a(g));
debugfs_remove_recursive(plat->debugfs); debugfs_remove_recursive(plat->debugfs);
} }

12
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -42,7 +42,6 @@
#include "pstate/pstate.h" #include "pstate/pstate.h"
#endif #endif
#ifdef CONFIG_TEGRA_19x_GPU #ifdef CONFIG_TEGRA_19x_GPU
#include "nvgpu_gpuid_t19x.h" #include "nvgpu_gpuid_t19x.h"
#endif #endif
@@ -152,7 +151,7 @@ int gk20a_prepare_poweroff(struct gk20a *g)
int gk20a_finalize_poweron(struct gk20a *g) int gk20a_finalize_poweron(struct gk20a *g)
{ {
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
int err; int err;
gk20a_dbg_fn(""); gk20a_dbg_fn("");
@@ -323,7 +322,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
if (platform->disable_aspm && g->ops.xve.disable_aspm) if (platform->disable_aspm && g->ops.xve.disable_aspm)
g->ops.xve.disable_aspm(g); g->ops.xve.disable_aspm(g);
g->ops.xve.sw_init(g->dev); g->ops.xve.sw_init(dev_from_gk20a(g));
g->ops.xve.available_speeds(g, &speed); g->ops.xve.available_speeds(g, &speed);
/* Set to max speed */ /* Set to max speed */
@@ -367,7 +366,7 @@ void gk20a_driver_start_unload(struct gk20a *g)
if (g->is_virtual) if (g->is_virtual)
return; return;
gk20a_wait_for_idle(g->dev); gk20a_wait_for_idle(dev_from_gk20a(g));
nvgpu_wait_for_deferred_interrupts(g); nvgpu_wait_for_deferred_interrupts(g);
gk20a_channel_cancel_pending_sema_waits(g); gk20a_channel_cancel_pending_sema_waits(g);
@@ -407,7 +406,7 @@ int gk20a_wait_for_idle(struct device *dev)
int gk20a_init_gpu_characteristics(struct gk20a *g) int gk20a_init_gpu_characteristics(struct gk20a *g)
{ {
struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics; struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics;
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
gpu->L2_cache_size = g->ops.ltc.determine_L2_size_bytes(g); gpu->L2_cache_size = g->ops.ltc.determine_L2_size_bytes(g);
gpu->on_board_video_memory_size = 0; /* integrated GPU */ gpu->on_board_video_memory_size = 0; /* integrated GPU */
@@ -499,7 +498,8 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
gpu->map_buffer_batch_limit = 256; gpu->map_buffer_batch_limit = 256;
if (platform->clk_round_rate) if (platform->clk_round_rate)
gpu->max_freq = platform->clk_round_rate(g->dev, UINT_MAX); gpu->max_freq = platform->clk_round_rate(dev_from_gk20a(g),
UINT_MAX);
g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec); g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec);
gpu->graphics_preemption_mode_flags = gpu->graphics_preemption_mode_flags =

3
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -39,6 +39,7 @@
#include "regops_gk20a.h" #include "regops_gk20a.h"
#include "dbg_gpu_gk20a.h" #include "dbg_gpu_gk20a.h"
#include "ctxsw_trace_gk20a.h" #include "ctxsw_trace_gk20a.h"
#include "platform_gk20a.h"
#include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h> #include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h>
#include <nvgpu/hw/gk20a/hw_ctxsw_prog_gk20a.h> #include <nvgpu/hw/gk20a/hw_ctxsw_prog_gk20a.h>
@@ -4826,7 +4827,7 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g)
gr->sw_ready = true; gr->sw_ready = true;
if (g->ops.gr.create_gr_sysfs) if (g->ops.gr.create_gr_sysfs)
g->ops.gr.create_gr_sysfs(g->dev); g->ops.gr.create_gr_sysfs(dev_from_gk20a(g));
gk20a_dbg_fn("done"); gk20a_dbg_fn("done");
return 0; return 0;

2
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
View File

@@ -1992,7 +1992,7 @@ int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
int err = 0; int err = 0;
struct gk20a_dmabuf_priv *priv; struct gk20a_dmabuf_priv *priv;
struct gk20a_buffer_state *s; struct gk20a_buffer_state *s;
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
if (WARN_ON(offset >= (u64)dmabuf->size)) if (WARN_ON(offset >= (u64)dmabuf->size))
return -EINVAL; return -EINVAL;

4
drivers/gpu/nvgpu/gm206/bios_gm206.c
View File

@@ -257,13 +257,13 @@ out:
int gm206_bios_init(struct gk20a *g) int gm206_bios_init(struct gk20a *g)
{ {
unsigned int i; unsigned int i;
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS
struct dentry *d; struct dentry *d;
#endif #endif
struct nvgpu_firmware *bios_fw; struct nvgpu_firmware *bios_fw;
int err; int err;
struct pci_dev *pdev = to_pci_dev(g->dev); struct pci_dev *pdev = to_pci_dev(dev_from_gk20a(g));
char rom_name[sizeof(BIOS_OVERLAY_NAME_FORMATTED)]; char rom_name[sizeof(BIOS_OVERLAY_NAME_FORMATTED)];
gk20a_dbg_fn(""); gk20a_dbg_fn("");

3
drivers/gpu/nvgpu/gm20b/gr_gm20b.c
View File

@@ -23,6 +23,7 @@
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/gr_gk20a.h" #include "gk20a/gr_gk20a.h"
#include "gk20a/platform_gk20a.h"
#include "gr_gm20b.h" #include "gr_gm20b.h"
#include "pmu_gm20b.h" #include "pmu_gm20b.h"
@@ -1422,7 +1423,7 @@ int gm20b_gr_tpc_disable_override(struct gk20a *g, u32 mask)
static int gm20b_gr_fuse_override(struct gk20a *g) static int gm20b_gr_fuse_override(struct gk20a *g)
{ {
struct device_node *np = g->dev->of_node; struct device_node *np = dev_from_gk20a(g)->of_node;
u32 *fuses; u32 *fuses;
int count, i; int count, i;

2
drivers/gpu/nvgpu/gp106/clk_gp106.c
View File

@@ -239,7 +239,7 @@ DEFINE_SIMPLE_ATTRIBUTE(get_rate_fops, gp106_get_rate_show, NULL, "%llu\n");
static int clk_gp106_debugfs_init(struct gk20a *g) { static int clk_gp106_debugfs_init(struct gk20a *g) {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *gpu_root = platform->debugfs; struct dentry *gpu_root = platform->debugfs;
struct dentry *clocks_root; struct dentry *clocks_root;

2
drivers/gpu/nvgpu/gp106/mclk_gp106.c
View File

@@ -3494,7 +3494,7 @@ static const struct file_operations mclk_switch_stats_fops = {
static int mclk_debugfs_init(struct gk20a *g) static int mclk_debugfs_init(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *gpu_root = platform->debugfs; struct dentry *gpu_root = platform->debugfs;
struct dentry *d; struct dentry *d;

2
drivers/gpu/nvgpu/gp106/therm_gp106.c
View File

@@ -68,7 +68,7 @@ static int therm_get_internal_sensor_curr_temp(void *data, u64 *val)
DEFINE_SIMPLE_ATTRIBUTE(therm_ctrl_fops, therm_get_internal_sensor_curr_temp, NULL, "%llu\n"); DEFINE_SIMPLE_ATTRIBUTE(therm_ctrl_fops, therm_get_internal_sensor_curr_temp, NULL, "%llu\n");
static void gp106_therm_debugfs_init(struct gk20a *g) { static void gp106_therm_debugfs_init(struct gk20a *g) {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *dbgentry; struct dentry *dbgentry;
dbgentry = debugfs_create_file( dbgentry = debugfs_create_file(

3
drivers/gpu/nvgpu/gp10b/gr_gp10b.c
View File

@@ -28,6 +28,7 @@
#include "gk20a/gr_gk20a.h" #include "gk20a/gr_gk20a.h"
#include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h"
#include "gk20a/regops_gk20a.h" #include "gk20a/regops_gk20a.h"
#include "gk20a/platform_gk20a.h"
#include "gm20b/gr_gm20b.h" #include "gm20b/gr_gm20b.h"
#include "gp10b/gr_gp10b.h" #include "gp10b/gr_gp10b.h"
@@ -2245,7 +2246,7 @@ static int gr_gp10b_get_preemption_mode_flags(struct gk20a *g,
} }
static int gp10b_gr_fuse_override(struct gk20a *g) static int gp10b_gr_fuse_override(struct gk20a *g)
{ {
struct device_node *np = g->dev->of_node; struct device_node *np = dev_from_gk20a(g)->of_node;
u32 *fuses; u32 *fuses;
int count, i; int count, i;

2
drivers/gpu/nvgpu/pmgr/pmgr.c
View File

@@ -112,7 +112,7 @@ DEFINE_SIMPLE_ATTRIBUTE(
pmgr_voltage_ctrl_fops, pmgr_pwr_devices_get_voltage_u64, NULL, "%llu\n"); pmgr_voltage_ctrl_fops, pmgr_pwr_devices_get_voltage_u64, NULL, "%llu\n");
static void pmgr_debugfs_init(struct gk20a *g) { static void pmgr_debugfs_init(struct gk20a *g) {
struct gk20a_platform *platform = dev_get_drvdata(g->dev); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
struct dentry *dbgentry; struct dentry *dbgentry;
dbgentry = debugfs_create_file( dbgentry = debugfs_create_file(

2
drivers/gpu/nvgpu/pmgr/pmgrpmu.c
View File

@@ -138,7 +138,7 @@ exit:
static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g)
{ {
struct nv_pmu_pmgr_i2c_device_desc_table i2c_desc_table; struct nv_pmu_pmgr_i2c_device_desc_table i2c_desc_table;
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
u32 idx = platform->ina3221_dcb_index; u32 idx = platform->ina3221_dcb_index;
u32 status = 0; u32 status = 0;

2
drivers/gpu/nvgpu/pmgr/pwrpolicy.c
View File

@@ -507,7 +507,7 @@ static inline void devinit_unpack_pwr_policy_entry(
static u32 devinit_get_pwr_policy_table(struct gk20a *g, static u32 devinit_get_pwr_policy_table(struct gk20a *g,
struct pmgr_pwr_policy *ppwrpolicyobjs) struct pmgr_pwr_policy *ppwrpolicyobjs)
{ {
struct gk20a_platform *platform = gk20a_get_platform(g->dev); struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
u32 status = 0; u32 status = 0;
u8 *ptr = NULL; u8 *ptr = NULL;
struct boardobj *boardobj; struct boardobj *boardobj;

2
drivers/gpu/nvgpu/vgpu/css_vgpu.c
View File

@@ -29,7 +29,7 @@ static struct tegra_hv_ivm_cookie *css_cookie;
static int vgpu_css_init_snapshot_buffer(struct gr_gk20a *gr) static int vgpu_css_init_snapshot_buffer(struct gr_gk20a *gr)
{ {
struct gk20a *g = gr->g; struct gk20a *g = gr->g;
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct gk20a_cs_snapshot *data = gr->cs_data; struct gk20a_cs_snapshot *data = gr->cs_data;
struct device_node *np = dev->of_node; struct device_node *np = dev->of_node;
struct of_phandle_args args; struct of_phandle_args args;

4
drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -35,7 +35,7 @@ struct vgpu_fecs_trace {
static int vgpu_fecs_trace_init(struct gk20a *g) static int vgpu_fecs_trace_init(struct gk20a *g)
{ {
struct device *dev = g->dev; struct device *dev = dev_from_gk20a(g);
struct device_node *np = dev->of_node; struct device_node *np = dev->of_node;
struct of_phandle_args args; struct of_phandle_args args;
struct device_node *hv_np; struct device_node *hv_np;

3
drivers/gpu/nvgpu/vgpu/vgpu.c
View File

@@ -206,7 +206,8 @@ static int vgpu_intr_thread(void *dev_id)
static void vgpu_remove_support(struct gk20a *g) static void vgpu_remove_support(struct gk20a *g)
{ {
struct vgpu_priv_data *priv = vgpu_get_priv_data_from_dev(g->dev); struct vgpu_priv_data *priv =
vgpu_get_priv_data_from_dev(dev_from_gk20a(g));
struct tegra_vgpu_intr_msg msg; struct tegra_vgpu_intr_msg msg;
int err; int err;

4
drivers/gpu/nvgpu/vgpu/vgpu.h
View File

@@ -41,7 +41,7 @@ struct vgpu_priv_data *vgpu_get_priv_data_from_dev(struct device *dev)
static inline struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g) static inline struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
{ {
return vgpu_get_priv_data_from_dev(g->dev); return vgpu_get_priv_data_from_dev(dev_from_gk20a(g));
} }
static inline u64 vgpu_get_handle_from_dev(struct device *dev) static inline u64 vgpu_get_handle_from_dev(struct device *dev)
@@ -58,7 +58,7 @@ static inline u64 vgpu_get_handle_from_dev(struct device *dev)
static inline u64 vgpu_get_handle(struct gk20a *g) static inline u64 vgpu_get_handle(struct gk20a *g)
{ {
return vgpu_get_handle_from_dev(g->dev); return vgpu_get_handle_from_dev(dev_from_gk20a(g));
} }
int vgpu_pm_prepare_poweroff(struct device *dev); int vgpu_pm_prepare_poweroff(struct device *dev);