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gpu: nvgpu: expose support for SM-TTU (Linux)

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Add NVGPU_SUPPORT_SM_TTU capability and map it to
NVGPU_GPU_FLAGS_SUPPORT_SM_TTU characteristics flag.

JIRA NVGPU-5482
Bug 2811407

Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Change-Id: Ie06034199bb54835cbb763cfbddae555b2933ac2
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2344213
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Riku Salminen <rsalminen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sami Kiminki
2020-05-14 17:40:42 +03:00
committed by Alex Waterman
parent 50dcfe1637
commit bac1bf6061
3 changed files with 9 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/include/nvgpu/enabled.h
View File

@@ -255,10 +255,13 @@ struct gk20a;
/** Enable compression */
#define NVGPU_SUPPORT_COMPRESSION 87U
/** SM TTU is enabled */
#define NVGPU_SUPPORT_SM_TTU 88U
/*
* Must be greater than the largest bit offset in the above list.
*/
#define NVGPU_MAX_ENABLED_BITS 88U
#define NVGPU_MAX_ENABLED_BITS 89U
/**
* @brief Check if the passed flag is enabled.

4
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -252,7 +252,9 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
{NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY,
NVGPU_SUPPORT_FAULT_RECOVERY},
{NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION,
NVGPU_SUPPORT_COMPRESSION}
NVGPU_SUPPORT_COMPRESSION},
{NVGPU_GPU_FLAGS_SUPPORT_SM_TTU,
NVGPU_SUPPORT_SM_TTU}
};
static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)

2
include/uapi/linux/nvgpu.h
View File

@@ -175,6 +175,8 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY (1ULL << 33)
/* Compression is enabled */
#define NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION (1ULL << 36)
/* SM TTU is enabled */
#define NVGPU_GPU_FLAGS_SUPPORT_SM_TTU (1ULL << 37)
/* SM LRF ECC is enabled */
#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
/* SM SHM ECC is enabled */