diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index ca0f0ba71..8a4d56397 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -21,6 +21,7 @@ ifeq ($(CONFIG_NVGPU_DEBUGGER),y) ccflags-y += -DNVGPU_DEBUGGER endif +ccflags-y += -DNVGPU_FEATURE_ACR_LEGACY ccflags-y += -DNVGPU_ENGINE ccflags-y += -DNVGPU_USERD ccflags-y += -DNVGPU_CHANNEL_WDT diff --git a/drivers/gpu/nvgpu/Makefile.shared.configs b/drivers/gpu/nvgpu/Makefile.shared.configs index 9405c8cad..7c4d68f75 100644 --- a/drivers/gpu/nvgpu/Makefile.shared.configs +++ b/drivers/gpu/nvgpu/Makefile.shared.configs @@ -84,6 +84,10 @@ NVGPU_COMMON_CFLAGS += -DNVGPU_FEATURE_CHANNEL_TSG_SCHEDULING # Flags enabled for only the regular build profile. # ifneq ($(profile),safety) +# ACR feature to enable old tegra ACR profile support +NVGPU_FEATURE_ACR_LEGACY := 1 +NVGPU_COMMON_CFLAGS += -DNVGPU_FEATURE_ACR_LEGACY + NVGPU_FECS_TRACE_SUPPORT := 1 NVGPU_COMMON_CFLAGS += -DCONFIG_GK20A_CTXSW_TRACE diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 451317064..8d5103f13 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -119,12 +119,8 @@ srcs += common/sim/sim.c \ common/acr/acr.c \ common/acr/acr_wpr.c \ common/acr/acr_blob_alloc.c \ - common/acr/acr_blob_construct_v0.c \ common/acr/acr_blob_construct_v1.c \ common/acr/acr_bootstrap.c \ - common/acr/acr_sw_gm20b.c \ - common/acr/acr_sw_gp10b.c \ - common/acr/acr_sw_gv100.c \ common/acr/acr_sw_gv11b.c \ common/ptimer/ptimer.c \ common/worker.c \ @@ -299,6 +295,13 @@ srcs += common/sim/sim.c \ hal/top/top_gp106.c \ hal/top/top_gv11b.c +ifeq ($(NVGPU_FEATURE_ACR_LEGACY),1) +srcs += \ + common/acr/acr_blob_construct_v0.c \ + common/acr/acr_sw_gm20b.c \ + common/acr/acr_sw_gp10b.c +endif + ifeq ($(NVGPU_GRAPHICS),1) srcs += common/gr/zbc.c \ common/gr/zcull.c \ @@ -470,6 +473,7 @@ srcs += common/engine_queues/engine_emem_queue.c \ common/vbios/bios_sw_tu104.c \ common/falcon/falcon_sw_gv100.c \ common/falcon/falcon_sw_tu104.c \ + common/acr/acr_sw_gv100.c \ common/acr/acr_sw_tu104.c \ hal/mm/mm_gv100.c \ hal/mm/mm_tu104.c \ diff --git a/drivers/gpu/nvgpu/common/acr/acr.c b/drivers/gpu/nvgpu/common/acr/acr.c index a56a2f16c..ca769f9da 100644 --- a/drivers/gpu/nvgpu/common/acr/acr.c +++ b/drivers/gpu/nvgpu/common/acr/acr.c @@ -28,8 +28,10 @@ #include #include "acr_priv.h" +#ifdef NVGPU_FEATURE_ACR_LEGACY #include "acr_sw_gm20b.h" #include "acr_sw_gp10b.h" +#endif #include "acr_sw_gv11b.h" #ifdef NVGPU_DGPU_SUPPORT #include "acr_sw_gv100.h" @@ -132,6 +134,7 @@ int nvgpu_acr_init(struct gk20a *g, struct nvgpu_acr **acr) } switch (ver) { +#ifdef NVGPU_FEATURE_ACR_LEGACY case GK20A_GPUID_GM20B: case GK20A_GPUID_GM20B_B: nvgpu_gm20b_acr_sw_init(g, *acr); @@ -139,6 +142,7 @@ int nvgpu_acr_init(struct gk20a *g, struct nvgpu_acr **acr) case NVGPU_GPUID_GP10B: nvgpu_gp10b_acr_sw_init(g, *acr); break; +#endif case NVGPU_GPUID_GV11B: nvgpu_gv11b_acr_sw_init(g, *acr); break; diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.c b/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.c index 7f2c99e3c..968da5d9e 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.c +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.c @@ -34,7 +34,7 @@ int nvgpu_acr_alloc_blob_space_sys(struct gk20a *g, size_t size, return nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_PHYSICALLY_ADDRESSED, size, mem); } - +#ifdef NVGPU_DGPU_SUPPORT int nvgpu_acr_alloc_blob_space_vid(struct gk20a *g, size_t size, struct nvgpu_mem *mem) { @@ -60,3 +60,4 @@ int nvgpu_acr_alloc_blob_space_vid(struct gk20a *g, size_t size, return nvgpu_dma_alloc_vid_at(g, wpr_inf.size, mem, wpr_inf.nonwpr_base); } +#endif diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.h b/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.h index ff51f54cd..da06616eb 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.h +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_alloc.h @@ -28,7 +28,9 @@ struct nvgpu_mem; int nvgpu_acr_alloc_blob_space_sys(struct gk20a *g, size_t size, struct nvgpu_mem *mem); +#ifdef NVGPU_DGPU_SUPPORT int nvgpu_acr_alloc_blob_space_vid(struct gk20a *g, size_t size, struct nvgpu_mem *mem); +#endif #endif /* ACR_BLOB_ALLOC_H */ diff --git a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c index 35ebb6afd..51f0e7efb 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c +++ b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c @@ -370,7 +370,7 @@ err_release_acr_fw: acr_desc->acr_fw = NULL; return status; } - +#ifdef NVGPU_DGPU_SUPPORT int nvgpu_acr_self_hs_load_bootstrap(struct gk20a *g, struct nvgpu_falcon *flcn, struct nvgpu_firmware *hs_fw, u32 timeout) { @@ -461,5 +461,5 @@ int nvgpu_acr_self_hs_load_bootstrap(struct gk20a *g, struct nvgpu_falcon *flcn, exit: return err; } - +#endif diff --git a/drivers/gpu/nvgpu/common/acr/acr_priv.h b/drivers/gpu/nvgpu/common/acr/acr_priv.h index 4c58b0ef2..86eb4fe82 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_priv.h +++ b/drivers/gpu/nvgpu/common/acr/acr_priv.h @@ -24,7 +24,9 @@ #define ACR_H #include "acr_bootstrap.h" +#ifdef NVGPU_FEATURE_ACR_LEGACY #include "acr_blob_construct_v0.h" +#endif #include "acr_blob_construct_v1.h" struct gk20a; diff --git a/drivers/gpu/nvgpu/common/acr/acr_wpr.c b/drivers/gpu/nvgpu/common/acr/acr_wpr.c index de14ee230..790952bff 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_wpr.c +++ b/drivers/gpu/nvgpu/common/acr/acr_wpr.c @@ -33,10 +33,11 @@ void nvgpu_acr_wpr_info_sys(struct gk20a *g, struct wpr_carveout_info *inf) { g->ops.fb.read_wpr_info(g, &inf->wpr_base, &inf->size); } - +#ifdef NVGPU_DGPU_SUPPORT void nvgpu_acr_wpr_info_vid(struct gk20a *g, struct wpr_carveout_info *inf) { inf->wpr_base = g->mm.vidmem.bootstrap_base; inf->nonwpr_base = inf->wpr_base + DGPU_WPR_SIZE; inf->size = DGPU_WPR_SIZE; } +#endif diff --git a/drivers/gpu/nvgpu/common/acr/acr_wpr.h b/drivers/gpu/nvgpu/common/acr/acr_wpr.h index d60140285..19d6d753b 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_wpr.h +++ b/drivers/gpu/nvgpu/common/acr/acr_wpr.h @@ -33,6 +33,8 @@ struct wpr_carveout_info { }; void nvgpu_acr_wpr_info_sys(struct gk20a *g, struct wpr_carveout_info *inf); +#ifdef NVGPU_DGPU_SUPPORT void nvgpu_acr_wpr_info_vid(struct gk20a *g, struct wpr_carveout_info *inf); +#endif #endif /* NVGPU_ACR_WPR_H */