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gpu: nvgpu: APIs to dump GR status

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Add below APIs to dump various GR status registers

1. debugfs : /d/gpu.0/gr_status
Read this debugfs at runtime to get status registers

2. API gk20a_gr_debug_dump()
Add this API in code to dump registers at any point

Bug 200062436

Change-Id: Ic1115b5a2fc16362954b5ed8a9e70afb872a8d91
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/486465
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2015-01-28 18:37:00 +05:30
committed by Dan Willemsen
parent aa96b6bd1e
commit bc1b5fdd56
7 changed files with 611 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

60
drivers/gpu/nvgpu/gk20a/debug_gk20a.c
View File

@@ -83,7 +83,7 @@ static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str,
seq_write((struct seq_file *)ctx, str, len);
}
static void gk20a_debug_output(struct gk20a_debug_output *o,
void gk20a_debug_output(struct gk20a_debug_output *o,
const char *fmt, ...)
{
va_list args;
@@ -223,6 +223,50 @@ void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
gk20a_idle(g->dev);
}
static int gk20a_gr_dump_regs(struct platform_device *pdev,
struct gk20a_debug_output *o)
{
struct gk20a_platform *platform = gk20a_get_platform(pdev);
struct gk20a *g = platform->g;
int err;
err = gk20a_busy(g->dev);
if (err) {
gk20a_err(&pdev->dev, "failed to power on gpu: %d\n", err);
return -EINVAL;
}
gr_gk20a_elpg_protected_call(g, g->ops.gr.dump_gr_regs(g, o));
gk20a_idle(g->dev);
return 0;
}
int gk20a_gr_debug_dump(struct platform_device *pdev)
{
struct gk20a_debug_output o = {
.fn = gk20a_debug_write_printk
};
gk20a_gr_dump_regs(pdev, &o);
return 0;
}
static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
{
struct platform_device *pdev = s->private;
struct gk20a_debug_output o = {
.fn = gk20a_debug_write_to_seqfile,
.ctx = s,
};
gk20a_gr_dump_regs(pdev, &o);
return 0;
}
void gk20a_debug_dump(struct platform_device *pdev)
{
struct gk20a_platform *platform = gk20a_get_platform(pdev);
@@ -277,11 +321,23 @@ static int gk20a_debug_show(struct seq_file *s, void *unused)
return 0;
}
static int gk20a_gr_debug_open(struct inode *inode, struct file *file)
{
return single_open(file, gk20a_gr_debug_show, inode->i_private);
}
static int gk20a_debug_open(struct inode *inode, struct file *file)
{
return single_open(file, gk20a_debug_show, inode->i_private);
}
static const struct file_operations gk20a_gr_debug_fops = {
.open = gk20a_gr_debug_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static const struct file_operations gk20a_debug_fops = {
.open = gk20a_debug_open,
.read = seq_read,
@@ -306,6 +362,8 @@ void gk20a_debug_init(struct platform_device *pdev)
debugfs_create_file("status", S_IRUGO, platform->debugfs,
pdev, &gk20a_debug_fops);
debugfs_create_file("gr_status", S_IRUGO, platform->debugfs,
pdev, &gk20a_gr_debug_fops);
debugfs_create_u32("trace_cmdbuf", S_IRUGO|S_IWUSR, platform->debugfs,
&gk20a_debug_trace_cmdbuf);

4
drivers/gpu/nvgpu/gk20a/debug_gk20a.h
View File

@@ -29,8 +29,12 @@ struct gk20a_debug_output {
char buf[256];
};
void gk20a_debug_output(struct gk20a_debug_output *o,
const char *fmt, ...);
void gk20a_debug_dump(struct platform_device *pdev);
void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o);
int gk20a_gr_debug_dump(struct platform_device *pdev);
void gk20a_debug_init(struct platform_device *pdev);
void gk20a_init_debug_ops(struct gpu_ops *gops);

2
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -159,6 +159,8 @@ struct gpu_ops {
void (*update_ctxsw_preemption_mode)(struct gk20a *g,
struct channel_ctx_gk20a *ch_ctx,
void *ctx_ptr);
int (*dump_gr_regs)(struct gk20a *g,
struct gk20a_debug_output *o);
} gr;
const char *name;
struct {

106
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -52,6 +52,7 @@
#include "gr_pri_gk20a.h"
#include "regops_gk20a.h"
#include "dbg_gpu_gk20a.h"
#include "debug_gk20a.h"
#include "semaphore_gk20a.h"
#define BLK_SIZE (256)
@@ -7322,6 +7323,110 @@ static u32 gr_gk20a_pagepool_default_size(struct gk20a *g)
return gr_scc_pagepool_total_pages_hwmax_value_v();
}
static int gr_gk20a_dump_gr_status_regs(struct gk20a *g,
struct gk20a_debug_output *o)
{
gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
gk20a_readl(g, gr_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n",
gk20a_readl(g, gr_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n",
gk20a_readl(g, gr_status_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n",
gk20a_readl(g, gr_engine_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n",
gk20a_readl(g, gr_gpfifo_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n",
gk20a_readl(g, gr_gpfifo_ctl_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n",
gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n",
gk20a_readl(g, gr_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n",
gk20a_readl(g, gr_fecs_intr_r()));
gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n",
gk20a_readl(g, gr_activity_4_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n",
gk20a_readl(g, gr_pri_sked_activity_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_on_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n",
gk20a_readl(g, gr_fe_go_idle_timeout_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_check_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_status_fe_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n",
gk20a_readl(g, gr_fecs_current_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n",
gk20a_readl(g, gr_fecs_new_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n",
gk20a_readl(g, gr_pri_be0_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n",
gk20a_readl(g, gr_pri_bes_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n",
gk20a_readl(g, gr_pri_be0_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n",
gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n",
gk20a_readl(g, gr_pri_bes_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n",
gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
return 0;
}
void gk20a_init_gr_ops(struct gpu_ops *gops)
{
gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg;
@@ -7362,5 +7467,6 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
gops->gr.init_ctx_state = gr_gk20a_init_ctx_state;
gops->gr.alloc_gr_ctx = gr_gk20a_alloc_gr_ctx;
gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx;
gops->gr.dump_gr_regs = gr_gk20a_dump_gr_status_regs;
}

152
drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h
View File

@@ -234,6 +234,10 @@ static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_f(void)
{
return 0x10000;
}
static inline u32 gr_gpfifo_status_r(void)
{
return 0x00400504;
}
static inline u32 gr_trapped_addr_r(void)
{
return 0x00400704;
@@ -278,6 +282,14 @@ static inline u32 gr_status_mask_r(void)
{
return 0x00400610;
}
static inline u32 gr_status_1_r(void)
{
return 0x00400604;
}
static inline u32 gr_status_2_r(void)
{
return 0x00400608;
}
static inline u32 gr_engine_status_r(void)
{
return 0x0040060c;
@@ -286,6 +298,126 @@ static inline u32 gr_engine_status_value_busy_f(void)
{
return 0x1;
}
static inline u32 gr_activity_0_r(void)
{
return 0x00400380;
}
static inline u32 gr_activity_1_r(void)
{
return 0x00400384;
}
static inline u32 gr_activity_2_r(void)
{
return 0x00400388;
}
static inline u32 gr_activity_4_r(void)
{
return 0x00400390;
}
static inline u32 gr_pri_sked_activity_r(void)
{
return 0x00407054;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity0_r(void)
{
return 0x00502c80;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity1_r(void)
{
return 0x00502c84;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity2_r(void)
{
return 0x00502c88;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity3_r(void)
{
return 0x00502c8c;
}
static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r(void)
{
return 0x00504500;
}
static inline u32 gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r(void)
{
return 0x00501d00;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_0_r(void)
{
return 0x0041ac80;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_1_r(void)
{
return 0x0041ac84;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_2_r(void)
{
return 0x0041ac88;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_3_r(void)
{
return 0x0041ac8c;
}
static inline u32 gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r(void)
{
return 0x0041c500;
}
static inline u32 gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r(void)
{
return 0x00419d00;
}
static inline u32 gr_pri_be0_becs_be_activity0_r(void)
{
return 0x00410200;
}
static inline u32 gr_pri_bes_becs_be_activity0_r(void)
{
return 0x00408a00;
}
static inline u32 gr_pri_ds_mpipe_status_r(void)
{
return 0x00405858;
}
static inline u32 gr_pri_fe_go_idle_on_status_r(void)
{
return 0x00404150;
}
static inline u32 gr_pri_fe_go_idle_check_r(void)
{
return 0x00404158;
}
static inline u32 gr_pri_fe_go_idle_info_r(void)
{
return 0x00404194;
}
static inline u32 gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r(void)
{
return 0x00504238;
}
static inline u32 gr_pri_be0_crop_status1_r(void)
{
return 0x00410134;
}
static inline u32 gr_pri_bes_crop_status1_r(void)
{
return 0x00408934;
}
static inline u32 gr_pri_be0_zrop_status_r(void)
{
return 0x00410048;
}
static inline u32 gr_pri_be0_zrop_status2_r(void)
{
return 0x0041004c;
}
static inline u32 gr_pri_bes_zrop_status_r(void)
{
return 0x00408848;
}
static inline u32 gr_pri_bes_zrop_status2_r(void)
{
return 0x0040884c;
}
static inline u32 gr_pipe_bundle_address_r(void)
{
return 0x00400200;
@@ -1062,6 +1194,26 @@ static inline u32 gr_fecs_arb_ctx_cmd_cmd_v(u32 r)
{
return (r >> 0) & 0x1f;
}
static inline u32 gr_fecs_ctxsw_status_fe_0_r(void)
{
return 0x00409c00;
}
static inline u32 gr_gpc0_gpccs_ctxsw_status_gpc_0_r(void)
{
return 0x00502c04;
}
static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void)
{
return 0x00502400;
}
static inline u32 gr_fecs_ctxsw_idlestate_r(void)
{
return 0x00409420;
}
static inline u32 gr_gpc0_gpccs_ctxsw_idlestate_r(void)
{
return 0x00502420;
}
static inline u32 gr_rstr2d_gpc_map0_r(void)
{
return 0x0040780c;

124
drivers/gpu/nvgpu/gm20b/gr_gm20b.c
View File

@@ -23,6 +23,7 @@
#include "gr_gm20b.h"
#include "hw_gr_gm20b.h"
#include "hw_fifo_gm20b.h"
#include "hw_fb_gm20b.h"
#include "hw_proj_gm20b.h"
#include "hw_ctxsw_prog_gm20b.h"
@@ -814,6 +815,128 @@ static void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g,
gk20a_dbg_fn("done");
}
static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
struct gk20a_debug_output *o)
{
struct gr_gk20a *gr = &g->gr;
gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
gk20a_readl(g, gr_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n",
gk20a_readl(g, gr_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n",
gk20a_readl(g, gr_status_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n",
gk20a_readl(g, gr_engine_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n",
gk20a_readl(g, gr_gpfifo_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n",
gk20a_readl(g, gr_gpfifo_ctl_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n",
gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n",
gk20a_readl(g, gr_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n",
gk20a_readl(g, gr_fecs_intr_r()));
gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n",
gk20a_readl(g, gr_activity_4_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n",
gk20a_readl(g, gr_pri_sked_activity_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
if (gr->gpc_tpc_count[0] == 2)
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r()));
if (gr->gpc_tpc_count[0] == 2)
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_tpc1_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_be1_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n",
gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_on_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n",
gk20a_readl(g, gr_fe_go_idle_timeout_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_check_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n",
gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n",
gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x\n",
gk20a_readl(g, gr_cwd_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x\n",
gk20a_readl(g, gr_fe_tpc_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x\n",
gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x\n",
gk20a_readl(g, gr_cwd_sm_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_status_fe_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n",
gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n",
gk20a_readl(g, gr_fecs_current_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n",
gk20a_readl(g, gr_fecs_new_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n",
gk20a_readl(g, gr_pri_be0_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n",
gk20a_readl(g, gr_pri_bes_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n",
gk20a_readl(g, gr_pri_be0_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n",
gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n",
gk20a_readl(g, gr_pri_bes_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n",
gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
return 0;
}
void gm20b_init_gr(struct gpu_ops *gops)
{
gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
@@ -857,4 +980,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx;
gops->gr.update_ctxsw_preemption_mode =
gr_gm20b_update_ctxsw_preemption_mode;
gops->gr.dump_gr_regs = gr_gm20b_dump_gr_status_regs;
}

164
drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
View File

@@ -222,6 +222,10 @@ static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_f(void)
{
return 0x10000;
}
static inline u32 gr_gpfifo_status_r(void)
{
return 0x00400504;
}
static inline u32 gr_trapped_addr_r(void)
{
return 0x00400704;
@@ -266,6 +270,14 @@ static inline u32 gr_status_mask_r(void)
{
return 0x00400610;
}
static inline u32 gr_status_1_r(void)
{
return 0x00400604;
}
static inline u32 gr_status_2_r(void)
{
return 0x00400608;
}
static inline u32 gr_engine_status_r(void)
{
return 0x0040060c;
@@ -274,6 +286,138 @@ static inline u32 gr_engine_status_value_busy_f(void)
{
return 0x1;
}
static inline u32 gr_activity_0_r(void)
{
return 0x00400380;
}
static inline u32 gr_activity_1_r(void)
{
return 0x00400384;
}
static inline u32 gr_activity_2_r(void)
{
return 0x00400388;
}
static inline u32 gr_activity_4_r(void)
{
return 0x00400390;
}
static inline u32 gr_pri_sked_activity_r(void)
{
return 0x00407054;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity0_r(void)
{
return 0x00502c80;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity1_r(void)
{
return 0x00502c84;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity2_r(void)
{
return 0x00502c88;
}
static inline u32 gr_pri_gpc0_gpccs_gpc_activity3_r(void)
{
return 0x00502c8c;
}
static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r(void)
{
return 0x00504500;
}
static inline u32 gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r(void)
{
return 0x00504d00;
}
static inline u32 gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r(void)
{
return 0x00501d00;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_0_r(void)
{
return 0x0041ac80;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_1_r(void)
{
return 0x0041ac84;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_2_r(void)
{
return 0x0041ac88;
}
static inline u32 gr_pri_gpcs_gpccs_gpc_activity_3_r(void)
{
return 0x0041ac8c;
}
static inline u32 gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r(void)
{
return 0x0041c500;
}
static inline u32 gr_pri_gpcs_tpc1_tpccs_tpc_activity_0_r(void)
{
return 0x0041cd00;
}
static inline u32 gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r(void)
{
return 0x00419d00;
}
static inline u32 gr_pri_be0_becs_be_activity0_r(void)
{
return 0x00410200;
}
static inline u32 gr_pri_be1_becs_be_activity0_r(void)
{
return 0x00410600;
}
static inline u32 gr_pri_bes_becs_be_activity0_r(void)
{
return 0x00408a00;
}
static inline u32 gr_pri_ds_mpipe_status_r(void)
{
return 0x00405858;
}
static inline u32 gr_pri_fe_go_idle_on_status_r(void)
{
return 0x00404150;
}
static inline u32 gr_pri_fe_go_idle_check_r(void)
{
return 0x00404158;
}
static inline u32 gr_pri_fe_go_idle_info_r(void)
{
return 0x00404194;
}
static inline u32 gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r(void)
{
return 0x00504238;
}
static inline u32 gr_pri_be0_crop_status1_r(void)
{
return 0x00410134;
}
static inline u32 gr_pri_bes_crop_status1_r(void)
{
return 0x00408934;
}
static inline u32 gr_pri_be0_zrop_status_r(void)
{
return 0x00410048;
}
static inline u32 gr_pri_be0_zrop_status2_r(void)
{
return 0x0041004c;
}
static inline u32 gr_pri_bes_zrop_status_r(void)
{
return 0x00408848;
}
static inline u32 gr_pri_bes_zrop_status2_r(void)
{
return 0x0040884c;
}
static inline u32 gr_pipe_bundle_address_r(void)
{
return 0x00400200;
@@ -1062,6 +1206,26 @@ static inline u32 gr_fecs_arb_ctx_cmd_cmd_v(u32 r)
{
return (r >> 0) & 0x1f;
}
static inline u32 gr_fecs_ctxsw_status_fe_0_r(void)
{
return 0x00409c00;
}
static inline u32 gr_gpc0_gpccs_ctxsw_status_gpc_0_r(void)
{
return 0x00502c04;
}
static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void)
{
return 0x00502400;
}
static inline u32 gr_fecs_ctxsw_idlestate_r(void)
{
return 0x00409420;
}
static inline u32 gr_gpc0_gpccs_ctxsw_idlestate_r(void)
{
return 0x00502420;
}
static inline u32 gr_rstr2d_gpc_map0_r(void)
{
return 0x0040780c;