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gpu: nvgpu: unit: use array for a lone tsg

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test_tsg_format_gen() uses a single tsg and passes its address on to be
used as an array (of a single element). Reduce confusion by using a
single-element tsg array already instead of a plain tsg.

Coverity ID 8335811

Change-Id: I0135bcabeed12474beb9c52c9d186de1676b5423
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1996287
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Holtta
2019-01-16 09:34:08 +02:00
committed by mobile promotions
parent fe765fc464
commit bca54edb08
1 changed files with 5 additions and 5 deletions
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10
userspace/units/fifo/runlist/nvgpu-runlist.c
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@@ -160,7 +160,7 @@ static int test_tsg_format_gen(struct unit_module *m, struct gk20a *g,
struct fifo_runlist_info_gk20a runlist; struct fifo_runlist_info_gk20a runlist;
unsigned long active_tsgs_map = 0; unsigned long active_tsgs_map = 0;
unsigned long active_chs_map = 0; unsigned long active_chs_map = 0;
struct tsg_gk20a tsg = {0}; struct tsg_gk20a tsgs[1] = {{0}};
struct channel_gk20a chs[5] = {{0}}; struct channel_gk20a chs[5] = {{0}};
/* header + at most five channels */ /* header + at most five channels */
const u32 entries_in_list_max = 1 + 5; const u32 entries_in_list_max = 1 + 5;
@@ -169,15 +169,15 @@ static int test_tsg_format_gen(struct unit_module *m, struct gk20a *g,
struct tsg_fmt_test_args *test_args = args; struct tsg_fmt_test_args *test_args = args;
(void)test_args->timeslice; (void)test_args->timeslice;
setup_fifo(g, &active_tsgs_map, &active_chs_map, &tsg, chs, 1, 5, setup_fifo(g, &active_tsgs_map, &active_chs_map, tsgs, chs, 1, 5,
&runlist, rl_data, false); &runlist, rl_data, false);
active_chs_map = test_args->chs_bitmap; active_chs_map = test_args->chs_bitmap;
tsg.timeslice_timeout = test_args->timeslice; tsgs[0].timeslice_timeout = test_args->timeslice;
tsg.timeslice_scale = NVGPU_FIFO_DEFAULT_TIMESLICE_SCALE; tsgs[0].timeslice_scale = NVGPU_FIFO_DEFAULT_TIMESLICE_SCALE;
ret = run_format_test(m, f, &tsg, chs, test_args->level, ret = run_format_test(m, f, &tsgs[0], chs, test_args->level,
test_args->channels, rl_data, test_args->channels, rl_data,
test_args->expect_header, test_args->expect_channel); test_args->expect_header, test_args->expect_channel);
if (ret != 0) { if (ret != 0) {