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gpu: nvgpu: Update runlist_id in TSG

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Update the runlist_id field in struct tsg to now be a pointer to
the relevant runlist. This further cleans up the rampant use of
runlist_ids throughout the driver.

Change-Id: I3dce990f198d534a80caa9ca95982255dcf104ad
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2470305
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Alex Waterman
2020-12-31 23:01:58 -06:00
committed by mobile promotions
parent d03bd05c90
commit bd1b395b5c
7 changed files with 54 additions and 73 deletions
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38
drivers/gpu/nvgpu/common/fifo/tsg.c
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@@ -113,14 +113,17 @@ int nvgpu_tsg_bind_channel(struct nvgpu_tsg *tsg, struct nvgpu_channel *ch)
ch->runqueue_sel = 1;
}
/* all the channel part of TSG should need to be same runlist_id */
if (tsg->runlist_id == NVGPU_INVALID_TSG_ID) {
tsg->runlist_id = ch->runlist->runlist_id;
/*
* All the channels in a TSG must share the same runlist.
*/
if (tsg->runlist == NULL) {
tsg->runlist = ch->runlist;
} else {
if (tsg->runlist_id != ch->runlist->runlist_id) {
if (tsg->runlist != ch->runlist) {
nvgpu_err(tsg->g,
"runlist_id mismatch ch[%d] tsg[%d]",
ch->runlist->runlist_id, tsg->runlist_id);
"runlist_id mismatch ch[%d] tsg[%d]",
ch->runlist->runlist_id,
tsg->runlist->runlist_id);
return -EINVAL;
}
}
@@ -673,11 +676,11 @@ int nvgpu_tsg_set_interleave(struct nvgpu_tsg *tsg, u32 level)
tsg->interleave_level = level;
/* TSG may not be bound yet */
if (tsg->runlist_id == NVGPU_INVALID_RUNLIST_ID) {
if (tsg->runlist == NULL) {
return 0;
}
return g->ops.runlist.reload(g, g->fifo.runlists[tsg->runlist_id], true, true);
return g->ops.runlist.reload(g, tsg->runlist, true, true);
}
int nvgpu_tsg_set_timeslice(struct nvgpu_tsg *tsg, u32 timeslice_us)
@@ -695,11 +698,11 @@ int nvgpu_tsg_set_timeslice(struct nvgpu_tsg *tsg, u32 timeslice_us)
tsg->timeslice_us = timeslice_us;
/* TSG may not be bound yet */
if (tsg->runlist_id == NVGPU_INVALID_RUNLIST_ID) {
if (tsg->runlist == NULL) {
return 0;
}
return g->ops.runlist.reload(g, g->fifo.runlists[tsg->runlist_id], true, true);
return g->ops.runlist.reload(g, tsg->runlist, true, true);
}
u32 nvgpu_tsg_get_timeslice(struct nvgpu_tsg *tsg)
@@ -713,19 +716,6 @@ u32 nvgpu_tsg_default_timeslice_us(struct gk20a *g)
return NVGPU_TSG_TIMESLICE_DEFAULT_US;
}
void nvgpu_tsg_enable_sched(struct gk20a *g, struct nvgpu_tsg *tsg)
{
nvgpu_runlist_set_state(g, BIT32(tsg->runlist_id),
RUNLIST_ENABLED);
}
void nvgpu_tsg_disable_sched(struct gk20a *g, struct nvgpu_tsg *tsg)
{
nvgpu_runlist_set_state(g, BIT32(tsg->runlist_id),
RUNLIST_DISABLED);
}
static void nvgpu_tsg_release_used_tsg(struct nvgpu_fifo *f,
struct nvgpu_tsg *tsg)
{
@@ -778,7 +768,7 @@ int nvgpu_tsg_open_common(struct gk20a *g, struct nvgpu_tsg *tsg, pid_t pid)
tsg->vm = NULL;
tsg->interleave_level = NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW;
tsg->timeslice_us = g->ops.tsg.default_timeslice_us(g);
tsg->runlist_id = NVGPU_INVALID_TSG_ID;
tsg->runlist = NULL;
#ifdef CONFIG_NVGPU_DEBUGGER
tsg->sm_exception_mask_type = NVGPU_SM_EXCEPTION_TYPE_MASK_NONE;
#endif