diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index a9d794c20..472dcc264 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1976,6 +1976,7 @@ void gr_gk20a_load_ctxsw_ucode_header(struct gk20a *g, u64 addr_base,
 
 	/* Write out the actual data */
 	switch (segments->boot_signature) {
+	case FALCON_UCODE_SIG_T18X_GPCCS_WITH_RESERVED:
 	case FALCON_UCODE_SIG_T21X_FECS_WITH_RESERVED:
 	case FALCON_UCODE_SIG_T21X_GPCCS_WITH_RESERVED:
 	case FALCON_UCODE_SIG_T12X_FECS_WITH_RESERVED:
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 0909b6607..6444a22d3 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -324,6 +324,10 @@ struct gk20a_ctxsw_ucode_segments {
 /* sums over the ucode files as sequences of u32, computed to the
  * boot_signature field in the structure above */
 
+/* T18X FECS remains same as T21X,
+ * so FALCON_UCODE_SIG_T21X_FECS_WITH_RESERVED used
+ * for T18X*/
+#define FALCON_UCODE_SIG_T18X_GPCCS_WITH_RESERVED	0x68edab34
 #define FALCON_UCODE_SIG_T21X_FECS_WITH_RESERVED	0x9125ab5c
 #define FALCON_UCODE_SIG_T12X_FECS_WITH_RESERVED	0x8a621f78
 #define FALCON_UCODE_SIG_T12X_FECS_WITHOUT_RESERVED	0x67e5344b
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 0682e4b85..6676c2e50 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -49,7 +49,7 @@
 /* Mapping between AP_CTRLs and Idle counters */
 #define PMU_AP_IDLE_MASK_GRAPHICS	(PMU_AP_IDLE_MASK_HIST_IDX_1)
 
-#define APP_VERSION_T186_0	19494277
+#define APP_VERSION_T186_0	19816464
 #define APP_VERSION_GM20B_4 19008461
 #define APP_VERSION_GM20B_3 18935575
 #define APP_VERSION_GM20B_2 18694072