diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index ddd3468c7..b126f31ab 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -192,7 +192,7 @@ int channel_gk20a_setup_ramfc(struct channel_gk20a *c, pbdma_gp_base_hi_limit2_f(ilog2(gpfifo_entries))); gk20a_mem_wr32(inst_ptr, ram_fc_signature_w(), - pbdma_signature_hw_valid_f() | pbdma_signature_sw_zero_f()); + c->g->ops.fifo.get_pbdma_signature(c->g)); gk20a_mem_wr32(inst_ptr, ram_fc_formats_w(), pbdma_formats_gp_fermi0_f() | diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index f50277f33..9dcab250a 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -2154,6 +2154,11 @@ static u32 gk20a_fifo_get_num_fifos(struct gk20a *g) return ccsr_channel__size_1_v(); } +u32 gk20a_fifo_get_pbdma_signature(struct gk20a *g) +{ + return pbdma_signature_hw_valid_f() | pbdma_signature_sw_zero_f(); +} + void gk20a_init_fifo(struct gpu_ops *gops) { gk20a_init_channel(gops); @@ -2163,4 +2168,5 @@ void gk20a_init_fifo(struct gpu_ops *gops) gops->fifo.apply_pb_timeout = gk20a_fifo_apply_pb_timeout; gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle; gops->fifo.get_num_fifos = gk20a_fifo_get_num_fifos; + gops->fifo.get_pbdma_signature = gk20a_fifo_get_pbdma_signature; } diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 8fda38f53..4ff1398a8 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -170,4 +170,6 @@ void fifo_gk20a_finish_mmu_fault_handling(struct gk20a *g, unsigned long fault_id); int gk20a_fifo_wait_engine_idle(struct gk20a *g); u32 gk20a_fifo_engine_interrupt_mask(struct gk20a *g); +u32 gk20a_fifo_get_pbdma_signature(struct gk20a *g); + #endif /*__GR_GK20A_H__*/ diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 0e06e7ded..fa80f010c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -212,6 +212,7 @@ struct gpu_ops { void (*apply_pb_timeout)(struct gk20a *g); int (*wait_engine_idle)(struct gk20a *g); u32 (*get_num_fifos)(struct gk20a *g); + u32 (*get_pbdma_signature)(struct gk20a *g); } fifo; struct pmu_v { /*used for change of enum zbc update cmd id from ver 0 to ver1*/ diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index cdc8c810c..640448cbd 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -118,4 +118,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) gops->fifo.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault; gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle; gops->fifo.get_num_fifos = gm20b_fifo_get_num_fifos; + gops->fifo.get_pbdma_signature = gk20a_fifo_get_pbdma_signature; }