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gpu: nvgpu: move preempt code to common/fifo and hal/fifo

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Move chip specific preempt code to hal/fifo
Move non-chip specific preempt code to common/fifo

Remove fifo.get_preempt_timeout

Rename gk20a_fifo_get_preempt_timeout -> nvgpu_preempt_get_timeout
Rename gk20a_fifo_preempt -> nvgpu_preempt_channel

Add fifo.preempt_trigger hal for issuing preempt
Add fifo.preempt_runlists_for_rc hal for preempting runlists during rc
Add fifo.preempt_poll_pbdma hal

Add nvgpu_preempt_poll_tsg_on_pbdma to be called from rc

JIRA NVGPU-3144

Change-Id: Idb089acaa0c6ca08de17487c3496459a61f0bcd4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2100819
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-04-18 12:02:35 -07:00
committed by mobile promotions
parent edaddb9bb2
commit bdfc26af8b
27 changed files with 889 additions and 645 deletions
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5
drivers/gpu/nvgpu/common/fifo/channel.c
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@@ -51,6 +51,7 @@
#include <nvgpu/runlist.h>
#include <nvgpu/fifo/userd.h>
#include <nvgpu/fence.h>
#include <nvgpu/preempt.h>
#include "common/gr/gr_priv.h"
#include "gk20a/gr_gk20a.h"
@@ -1175,7 +1176,7 @@ int nvgpu_channel_set_syncpt(struct channel_gk20a *ch)
gk20a_disable_channel_tsg(g, ch);
/* preempt the channel */
WARN_ON(gk20a_fifo_preempt(g, ch) != 0);
WARN_ON(nvgpu_preempt_channel(g, ch) != 0);
g->ops.ramfc.set_syncpt(ch, new_syncpt);
}
@@ -2516,7 +2517,7 @@ int nvgpu_channel_suspend_all_serviceable_ch(struct gk20a *g)
/* disable channel */
gk20a_disable_channel_tsg(g, ch);
/* preempt the channel */
gk20a_fifo_preempt(g, ch);
nvgpu_preempt_channel(g, ch);
/* wait for channel update notifiers */
if (g->os_channel.work_completion_cancel_sync != NULL) {
g->os_channel.work_completion_cancel_sync(ch);