From bfafc8c4f1d6fdc5ebdb096e211326cb38559fdc Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Wed, 1 May 2019 14:42:06 -0700 Subject: [PATCH] gpu: nvgpu: runlist MISRA fixes for Rule 17.7 Check return code for nvgpu_pmu_lock_release, g->ops.runlist.reschedule_preempt_next_locked and g->ops.runlist.wait_pending and throw an error message in case of failure. Jira NVGPU-3379 Change-Id: If8a88e54f3dc769c70b772dfc93acfffb4b38d4d Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2109684 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/runlist.c | 26 +++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/common/fifo/runlist.c b/drivers/gpu/nvgpu/common/fifo/runlist.c index 202b02244..cb7855b08 100644 --- a/drivers/gpu/nvgpu/common/fifo/runlist.c +++ b/drivers/gpu/nvgpu/common/fifo/runlist.c @@ -466,14 +466,22 @@ int nvgpu_runlist_reschedule(struct channel_gk20a *ch, bool preempt_next, g, ch->runlist_id, runlist->count, runlist->cur_buffer); if (preempt_next) { - g->ops.runlist.reschedule_preempt_next_locked(ch, wait_preempt); + if (g->ops.runlist.reschedule_preempt_next_locked(ch, + wait_preempt) != 0) { + nvgpu_err(g, "reschedule preempt next failed"); + } } - g->ops.runlist.wait_pending(g, ch->runlist_id); + if (g->ops.runlist.wait_pending(g, ch->runlist_id) != 0) { + nvgpu_err(g, "wait pending failed for runlist %u", + ch->runlist_id); + } if (mutex_ret == 0) { - nvgpu_pmu_lock_release( - g, &g->pmu, PMU_MUTEX_ID_FIFO, &token); + if (nvgpu_pmu_lock_release(g, &g->pmu, + PMU_MUTEX_ID_FIFO, &token) != 0) { + nvgpu_err(g, "failed to release PMU lock"); + } } nvgpu_mutex_release(&runlist->runlist_lock); @@ -507,7 +515,10 @@ static int nvgpu_runlist_update(struct gk20a *g, u32 runlist_id, wait_for_finish); if (mutex_ret == 0) { - nvgpu_pmu_lock_release(g, &g->pmu, PMU_MUTEX_ID_FIFO, &token); + if (nvgpu_pmu_lock_release(g, &g->pmu, + PMU_MUTEX_ID_FIFO, &token) != 0) { + nvgpu_err(g, "failed to release PMU lock"); + } } nvgpu_mutex_release(&runlist->runlist_lock); @@ -601,7 +612,10 @@ void nvgpu_fifo_runlist_set_state(struct gk20a *g, u32 runlists_mask, g->ops.runlist.write_state(g, runlists_mask, runlist_state); if (mutex_ret == 0) { - nvgpu_pmu_lock_release(g, &g->pmu, PMU_MUTEX_ID_FIFO, &token); + if (nvgpu_pmu_lock_release(g, &g->pmu, + PMU_MUTEX_ID_FIFO, &token) != 0) { + nvgpu_err(g, "failed to release PMU lock"); + } } }