From bfc3c57afb0fdb91427c41f0b63eeb017ff1c9ec Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Wed, 13 Feb 2019 11:21:41 -0500 Subject: [PATCH] gpu: nvgpu: perf: fix MISRA 10.3 violations Fix MISRA Rule 10.3 violations in common/pmu/perf for assigning objects of different size or essential type. JIRA NVGPU-1008 Change-Id: I7fa7f981ba80c2d6951821ed3c847a814fc8b3b6 Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2027654 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-misra-checker Reviewed-by: Adeel Raza GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/pmu/perf/perf_gv100.c | 6 +++--- drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/common/pmu/perf/perf_gv100.c b/drivers/gpu/nvgpu/common/pmu/perf/perf_gv100.c index 3f1bd44a3..c15c67c77 100644 --- a/drivers/gpu/nvgpu/common/pmu/perf/perf_gv100.c +++ b/drivers/gpu/nvgpu/common/pmu/perf/perf_gv100.c @@ -82,11 +82,11 @@ static int gv100_pmu_handle_perf_event(struct gk20a *g, void *pmumsg) return 0; } -static u32 perf_pmu_init_vfe_perf_event(struct gk20a *g) +static int perf_pmu_init_vfe_perf_event(struct gk20a *g) { struct perf_pmupstate *perf_pmu = g->perf_pmu; char thread_name[64]; - u32 err = 0; + int err = 0; nvgpu_log_fn(g, " "); @@ -97,7 +97,7 @@ static u32 perf_pmu_init_vfe_perf_event(struct gk20a *g) err = nvgpu_thread_create(&perf_pmu->vfe_init.state_task, g, pmu_set_boot_clk_runcb_fn, thread_name); - if (err != 0U) { + if (err != 0) { nvgpu_err(g, "failed to start nvgpu_vfe_invalidate_init thread"); } diff --git a/drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c b/drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c index 7b2b7afbb..a0e3fb956 100644 --- a/drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c +++ b/drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c @@ -1188,9 +1188,9 @@ static int devinit_get_vfe_var_table(struct gk20a *g, var.param1; if (szfmt >= VBIOS_VFE_3X_VAR_ENTRY_SIZE_19) { var_data.single_sensed_fuse.vfield_info.hw_correction_scale = - (int)var.param2; + var.param2; var_data.single_sensed_fuse.vfield_info.hw_correction_offset = - var.param3; + (int)var.param3; } else { var_data.single_sensed_fuse.vfield_info.hw_correction_scale = BIT32(12); diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h index 589835e62..53b286809 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h @@ -88,7 +88,7 @@ struct nv_pmu_perf_cmd_rpc { }; #define NV_PMU_PERF_CMD_RPC_ALLOC_OFFSET \ - offsetof(struct nv_pmu_perf_cmd_rpc, request) + (u32)offsetof(struct nv_pmu_perf_cmd_rpc, request) /*! * Simply a union of all specific PERF commands. Forms the general packet @@ -137,7 +137,7 @@ struct nv_pmu_perf_msg_rpc { }; #define NV_PMU_PERF_MSG_RPC_ALLOC_OFFSET \ - (offsetof(struct nv_pmu_perf_msg_rpc, response)) + ((u32)offsetof(struct nv_pmu_perf_msg_rpc, response)) /*! * Simply a union of all specific PERF messages. Forms the general packet