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gpu: nvgpu: Move gv11b MMU fault handling to HAL

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Move the gv11b MMU fault handling code into a new mm.mmu_fault HAL.
Also move the existing gmmu_mmu_fault HAL code into this HAL as they
are basically the same logical entity.

JIRA NVGPU-2042
JIRA NVGPU-1313

Change-Id: I41d3e180c762f191d4de3237e9052bdc456f9e4c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109693
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2019-05-01 13:26:30 -07:00
committed by mobile promotions
parent cfb4ff0bfb
commit c053bc0226
17 changed files with 167 additions and 232 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -35,8 +35,7 @@
#include <os/posix/os_posix.h>
#include <nvgpu/posix/posix-fault-injection.h>
#include <gv11b/mm_gv11b.h>
#include "hal/mm/mmu_fault/mmu_fault_gv11b.h"
#include <hal/mm/mm_gv11b.h>
#include <hal/mm/cache/flush_gk20a.h>
#include <hal/mm/cache/flush_gv11b.h>

15
userspace/units/mm/page_table_faults/page_table_faults.c
View File

@@ -35,9 +35,9 @@
#include <nvgpu/nvgpu_sgt.h>
#include <nvgpu/fifo.h>
#include "os/posix/os_posix.h"
#include "gv11b/mm_gv11b.h"
#include "common/fifo/channel_gv11b.h"
#include "hal/mm/mmu_fault/mmu_fault_gv11b.h"
#include "hal/mm/mm_gv11b.h"
#include "hal/mm/cache/flush_gk20a.h"
#include "hal/mm/cache/flush_gv11b.h"
@@ -133,8 +133,9 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
/* New HALs for fault testing */
g->ops.mc.is_mmu_fault_pending = gv11b_mc_is_mmu_fault_pending;
g->ops.mm.fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy;
g->ops.mm.mmu_fault_disable_hw = gv11b_mm_mmu_fault_disable_hw;
g->ops.mm.mmu_fault.info_mem_destroy =
gv11b_mm_mmu_fault_info_mem_destroy;
g->ops.mm.mmu_fault.disable_hw = gv11b_mm_mmu_fault_disable_hw;
g->ops.mm.setup_hw = nvgpu_mm_setup_hw;
g->ops.mm.cache.l2_flush = gv11b_mm_l2_flush;
g->ops.mm.cache.fb_flush = gk20a_mm_fb_flush;
@@ -293,7 +294,7 @@ static int test_page_faults_pending(struct unit_module *m, struct gk20a *g,
static int test_page_faults_disable_hw(struct unit_module *m, struct gk20a *g,
void *args)
{
g->ops.mm.mmu_fault_disable_hw(g);
g->ops.mm.mmu_fault.disable_hw(g);
if (g->ops.fb.is_fault_buf_enabled(g,
NVGPU_MMU_FAULT_NONREPLAY_REG_INDX)) {
unit_return_fail(m, "Non-replay buf still enabled\n");
@@ -304,7 +305,7 @@ static int test_page_faults_disable_hw(struct unit_module *m, struct gk20a *g,
}
/* Call disable again to test some branches */
g->ops.mm.mmu_fault_disable_hw(g);
g->ops.mm.mmu_fault.disable_hw(g);
return UNIT_SUCCESS;
}
@@ -351,12 +352,12 @@ static int test_page_faults_clean(struct unit_module *m, struct gk20a *g,
void *args)
{
g->log_mask = 0;
g->ops.mm.fault_info_mem_destroy(g);
g->ops.mm.mmu_fault.info_mem_destroy(g);
nvgpu_vm_put(g->mm.pmu.vm);
nvgpu_vm_put(g->mm.bar2.vm);
/* Call again to test some branches */
g->ops.mm.fault_info_mem_destroy(g);
g->ops.mm.mmu_fault.info_mem_destroy(g);
return UNIT_SUCCESS;
}