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gpu: nvgpu: disable nvgpu rpm if genpd support is not available
GPU is set to always ON state on safety L4T for SMCU to not fault. However, nvgpu railgating was always enabled. This will lead to improper GPU railgate/unrailgate sequence as bpmp will not powergate/ungate the gpu on suspend and resume requests. Keeping rpm enabled can lead to ACR failure on resume as it expects the GPU to be reset on every resume. Disable nvgpu runtime PM when the power domain node for the gpu is not defined. Bug 4111746 Change-Id: I9215ea87dbfbf53360003cac5f8a51d39982ace9 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2904335 Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@@ -187,7 +187,8 @@ static void nvgpu_init_timeslice(struct gk20a *g)
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static void nvgpu_init_pm_vars(struct gk20a *g)
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static void nvgpu_init_pm_vars(struct gk20a *g)
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{
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
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struct device *dev = dev_from_gk20a(g);
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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/*
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/*
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* Set up initial power settings. For non-slicon platforms, disable
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* Set up initial power settings. For non-slicon platforms, disable
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@@ -239,6 +240,17 @@ static void nvgpu_init_pm_vars(struct gk20a *g)
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/* Always enable railgating on simulation platform */
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/* Always enable railgating on simulation platform */
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platform->can_railgate_init = nvgpu_platform_is_simulation(g) ?
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platform->can_railgate_init = nvgpu_platform_is_simulation(g) ?
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true : platform->can_railgate_init;
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true : platform->can_railgate_init;
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/*
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* Disable railgating if GPU power domain node is not defined
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* in the DT as bpmp will not powergate/ungate the GPU on
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* suspend/resume and can lead to ACR failure on resume
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* as it expects GPU to be reset on every resume.
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*/
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if (!of_property_read_bool(dev->of_node, "power-domains")) {
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platform->can_railgate_init = false;
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}
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nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE,
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nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE,
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platform->can_railgate_init);
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platform->can_railgate_init);
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}
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}
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