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gpu: nvgpu: add macro for clk arb debug logs

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Introduce a macro for clk arbiter debug logs.

Jira VQRM-3741

Change-Id: I9f4ebf5f979e84b6383dc8755eb34c0ffa3d0f43
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1709652
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sourab Gupta
2018-05-04 12:13:41 +05:30
committed by mobile promotions
parent fc3ac7d2ae
commit c06c2c52ce
3 changed files with 23 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/nvgpu/clk/clk_arb.c
View File

@@ -752,7 +752,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct nvgpu_clk_arb *arb)
#endif
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
/* bail out if gpu is down */
if (nvgpu_atomic64_read(&arb->alarm_mask) & EVENT(ALARM_GPU_LOST))
@@ -1031,7 +1031,7 @@ exit_arb:
static void nvgpu_clk_arb_worker_process_item(
struct nvgpu_clk_arb_work_item *work_item)
{
nvgpu_log(work_item->arb->g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(work_item->arb->g, " ");
if (work_item->item_type == CLK_ARB_WORK_UPDATE_VF_TABLE)
nvgpu_clk_arb_run_vf_table_cb(work_item->arb);
@@ -1050,7 +1050,7 @@ static int nvgpu_clk_arb_worker_wakeup(struct gk20a *g)
{
int put;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
put = nvgpu_atomic_inc_return(&g->clk_arb_worker.put);
nvgpu_cond_signal_interruptible(&g->clk_arb_worker.wq);
@@ -1118,7 +1118,7 @@ static int nvgpu_clk_arb_poll_worker(void *arg)
struct gk20a_worker *worker = &g->clk_arb_worker;
int get = 0;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
while (!nvgpu_thread_should_stop(&worker->poll_task)) {
int ret;
@@ -1175,7 +1175,7 @@ static int __nvgpu_clk_arb_worker_start(struct gk20a *g)
void nvgpu_clk_arb_worker_enqueue(struct gk20a *g,
struct nvgpu_clk_arb_work_item *work_item)
{
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
/*
* Warn if worker thread cannot run
@@ -1232,7 +1232,7 @@ int nvgpu_clk_arb_init_arbiter(struct gk20a *g)
int index;
struct nvgpu_clk_vf_table *table;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
if (!g->ops.clk_arb.get_arbiter_clk_domains)
return 0;
@@ -1420,7 +1420,7 @@ int nvgpu_clk_arb_init_session(struct gk20a *g,
struct nvgpu_clk_arb *arb = g->clk_arb;
struct nvgpu_clk_session *session = *(_session);
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
if (!g->ops.clk_arb.get_arbiter_clk_domains)
return 0;
@@ -1469,7 +1469,7 @@ void nvgpu_clk_arb_free_session(struct nvgpu_ref *refcount)
struct gk20a *g = session->g;
struct nvgpu_clk_dev *dev, *tmp;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
if (arb) {
nvgpu_spinlock_acquire(&arb->sessions_lock);
@@ -1493,7 +1493,7 @@ void nvgpu_clk_arb_release_session(struct gk20a *g,
{
struct nvgpu_clk_arb *arb = g->clk_arb;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
session->zombie = true;
nvgpu_ref_put(&session->refcount, nvgpu_clk_arb_free_session);

18
drivers/gpu/nvgpu/common/linux/ioctl_clk_arb.c
View File

@@ -53,7 +53,7 @@ static int nvgpu_clk_arb_release_completion_dev(struct inode *inode,
struct nvgpu_clk_session *session = dev->session;
nvgpu_log(session->g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(session->g, " ");
nvgpu_ref_put(&session->refcount, nvgpu_clk_arb_free_session);
nvgpu_ref_put(&dev->refcount, nvgpu_clk_arb_free_fd);
@@ -82,7 +82,7 @@ static unsigned int nvgpu_clk_arb_poll_dev(struct file *filp, poll_table *wait)
{
struct nvgpu_clk_dev *dev = filp->private_data;
nvgpu_log(dev->session->g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(dev->session->g, " ");
poll_wait(filp, &dev->readout_wq.wq, wait);
return nvgpu_convert_poll_mask(nvgpu_atomic_xchg(&dev->poll_mask, 0));
@@ -97,7 +97,7 @@ static int nvgpu_clk_arb_release_event_dev(struct inode *inode,
arb = session->g->clk_arb;
nvgpu_log(session->g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(session->g, " ");
if (arb) {
nvgpu_spinlock_acquire(&arb->users_lock);
@@ -180,7 +180,7 @@ static ssize_t nvgpu_clk_arb_read_event_dev(struct file *filp, char __user *buf,
struct nvgpu_gpu_event_info info;
ssize_t err;
nvgpu_log(dev->session->g, gpu_dbg_fn | gpu_dbg_clk_arb,
clk_arb_dbg(dev->session->g,
"filp=%p, buf=%p, size=%zu", filp, buf, size);
if ((size - *off) < sizeof(info))
@@ -296,7 +296,7 @@ static int nvgpu_clk_arb_install_fd(struct gk20a *g,
char name[64];
struct nvgpu_clk_dev *dev;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
dev = nvgpu_kzalloc(g, sizeof(*dev));
if (!dev)
@@ -352,7 +352,7 @@ int nvgpu_clk_arb_install_event_fd(struct gk20a *g,
struct nvgpu_clk_dev *dev;
int fd;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
fd = nvgpu_clk_arb_install_fd(g, session, &event_dev_ops, &dev);
if (fd < 0)
@@ -384,7 +384,7 @@ int nvgpu_clk_arb_install_request_fd(struct gk20a *g,
struct nvgpu_clk_dev *dev;
int fd;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
fd = nvgpu_clk_arb_install_fd(g, session, &completion_dev_ops, &dev);
if (fd < 0)
@@ -403,7 +403,7 @@ int nvgpu_clk_arb_commit_request_fd(struct gk20a *g,
struct fd fd;
int err = 0;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_clk_arb, " ");
clk_arb_dbg(g, " ");
fd = fdget(request_fd);
if (!fd.file)
@@ -438,7 +438,7 @@ int nvgpu_clk_arb_set_session_target_mhz(struct nvgpu_clk_session *session,
struct fd fd;
int err = 0;
nvgpu_log(session->g, gpu_dbg_fn | gpu_dbg_clk_arb,
clk_arb_dbg(session->g,
"domain=0x%08x target_mhz=%u", api_domain, target_mhz);
fd = fdget(request_fd);

5
drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
View File

@@ -102,6 +102,11 @@ struct nvgpu_clk_session;
#define NVGPU_POLLRDNORM (1 << 3)
#define NVGPU_POLLHUP (1 << 4)
#define clk_arb_dbg(g, fmt, args...) \
do { \
nvgpu_log(g, gpu_dbg_clk_arb, \
fmt, ##args); \
} while (0)
struct nvgpu_clk_notification {
u32 notification;