gpu: nvgpu: add MISRA-compliant string ops

Add nvgpu_memcpy/nvgpu_memcmp which are MISRA-compliant versions
(Rule 21.15) of memcpy/memcmp.

Also convert some clk/gr calls over to use the new routines;
all of the remaining calls will be converted in subsequent patches.

JIRA NVGPU-849

Change-Id: Ib3a602cd08886764ba9a50285462a8b07bfb18ba
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919470
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/Makefile

@@ -204,6 +204,7 @@ nvgpu-y += \
 	common/mm/mm.o \
 	common/mm/dma.o \
 	common/enabled.o \
+	common/string.o \
 	common/nvlink.o \
 	common/pramin.o \
 	common/semaphore.o \

drivers/gpu/nvgpu/Makefile.sources

@@ -86,6 +86,7 @@ srcs :=	os/posix/nvgpu.c \
 	common/enabled.c \
 	common/pramin.c \
 	common/semaphore.c \
+	common/string.c \
 	common/as.c \
 	common/rbtree.c \
 	common/ltc/ltc.c \

drivers/gpu/nvgpu/clk/clk_domain.c

@@ -24,6 +24,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "clk.h"
 #include "clk_fll.h"
@@ -155,7 +156,7 @@ static int _clk_domains_pmudatainit_3x(struct gk20a *g,
 				pdomains->master_domains_mask.super.bitcount,
 				&pset->master_domains_mask.super);
 
-	memcpy(&pset->deltas, &pdomains->deltas,
+	nvgpu_memcpy((u8 *)&pset->deltas, (u8 *)&pdomains->deltas,
 		(sizeof(struct ctrl_clk_clk_delta)));
 
 done:
@@ -322,7 +323,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
 
 	nvgpu_log_info(g, " ");
 
-	memcpy(&clocks_table_header, clocks_table_ptr,
+	nvgpu_memcpy((u8 *)&clocks_table_header, clocks_table_ptr,
 			VBIOS_CLOCKS_TABLE_35_HEADER_SIZE_09);
 	if (clocks_table_header.header_size <
 			(u8) VBIOS_CLOCKS_TABLE_35_HEADER_SIZE_09) {
@@ -361,8 +362,8 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
 	clocks_tbl_entry_ptr = clocks_table_ptr +
 			clocks_table_header.header_size;
 	for (index = 0; index < clocks_table_header.entry_count; index++) {
-		memcpy((void*) &clocks_table_entry, (void*) clocks_tbl_entry_ptr,
-				clocks_table_header.entry_size);
+		nvgpu_memcpy((u8 *)&clocks_table_entry,
+			clocks_tbl_entry_ptr, clocks_table_header.entry_size);
 		clk_domain_data.clk_domain.domain =
 				(u8) vbiosclktbl1xhalentry[index].domain;
 		clk_domain_data.clk_domain.api_domain =
@@ -528,7 +529,7 @@ static int devinit_get_clocks_table_1x(struct gk20a *g,
 
 	nvgpu_log_info(g, " ");
 
-	memcpy(&clocks_table_header, clocks_table_ptr,
+	nvgpu_memcpy((u8 *)&clocks_table_header, clocks_table_ptr,
 			VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07);
 	if (clocks_table_header.header_size <
 			(u8) VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07) {
@@ -567,8 +568,8 @@ static int devinit_get_clocks_table_1x(struct gk20a *g,
 	clocks_tbl_entry_ptr = clocks_table_ptr +
 		VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07;
 	for (index = 0; index < clocks_table_header.entry_count; index++) {
-		memcpy((void*) &clocks_table_entry, (void*) clocks_tbl_entry_ptr,
-				clocks_table_header.entry_size);
+		nvgpu_memcpy((u8 *)&clocks_table_entry,
+			clocks_tbl_entry_ptr, clocks_table_header.entry_size);
 		clk_domain_data.clk_domain.domain =
 				(u8) vbiosclktbl1xhalentry[index].domain;
 		clk_domain_data.clk_domain.api_domain =
@@ -712,7 +713,7 @@ static int devinit_get_clocks_table(struct gk20a *g,
 		status = -EINVAL;
 		goto done;
 	}
-	memcpy(&clocks_table_header, clocks_table_ptr,
+	nvgpu_memcpy((u8 *)&clocks_table_header, clocks_table_ptr,
 			VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07);
 	if (clocks_table_header.version == 0x35U) {
 		devinit_get_clocks_table_35(g, pclkdomainobjs, clocks_table_ptr);
@@ -1091,7 +1092,7 @@ static int clk_domain_pmudatainit_35_prog(struct gk20a *g,
 	pset->super.factory_delta = pclk_domain_3x_prog->factory_delta;
 	pset->super.freq_delta_min_mhz = pclk_domain_3x_prog->freq_delta_min_mhz;
 	pset->super.freq_delta_max_mhz = pclk_domain_3x_prog->freq_delta_max_mhz;
-	memcpy(&pset->super.deltas, &pdomains->deltas,
+	nvgpu_memcpy((u8 *)&pset->super.deltas, (u8 *)&pdomains->deltas,
 		(sizeof(struct ctrl_clk_clk_delta)));
 	pset->pre_volt_ordering_index = pclk_domain_35_prog->pre_volt_ordering_index;
 	pset->post_volt_ordering_index = pclk_domain_35_prog->post_volt_ordering_index;
@@ -1133,7 +1134,7 @@ static int _clk_domain_pmudatainit_3x_prog(struct gk20a *g,
 	pset->super.factory_delta = pclk_domain_3x_prog->factory_delta;
 	pset->super.freq_delta_min_mhz = pclk_domain_3x_prog->freq_delta_min_mhz;
 	pset->super.freq_delta_max_mhz = pclk_domain_3x_prog->freq_delta_max_mhz;
-	memcpy(&pset->super.deltas, &pdomains->deltas,
+	nvgpu_memcpy((u8 *)&pset->super.deltas, (u8 *)&pdomains->deltas,
 		(sizeof(struct ctrl_clk_clk_delta)));
 
 	return status;

drivers/gpu/nvgpu/clk/clk_fll.c

@@ -24,6 +24,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "clk.h"
 #include "clk_fll.h"
@@ -254,7 +255,7 @@ static int devinit_get_fll_device_table(struct gk20a *g,
 		goto done;
 	}
 
-	memcpy(&fll_desc_table_header_sz, fll_table_ptr,
+	nvgpu_memcpy((u8 *)&fll_desc_table_header_sz, fll_table_ptr,
 			sizeof(struct fll_descriptor_header));
 	if (fll_desc_table_header_sz.size >= FLL_DESCRIPTOR_HEADER_10_SIZE_6) {
 		desctablesize = FLL_DESCRIPTOR_HEADER_10_SIZE_6;
@@ -262,7 +263,8 @@ static int devinit_get_fll_device_table(struct gk20a *g,
 		desctablesize = FLL_DESCRIPTOR_HEADER_10_SIZE_4;
 	}
 
-	memcpy(&fll_desc_table_header, fll_table_ptr, desctablesize);
+	nvgpu_memcpy((u8 *)&fll_desc_table_header, fll_table_ptr,
+		desctablesize);
 
 	if (desctablesize == FLL_DESCRIPTOR_HEADER_10_SIZE_6) {
 		pfllobjs->max_min_freq_mhz =
@@ -276,7 +278,7 @@ static int devinit_get_fll_device_table(struct gk20a *g,
 	for (index = 0; index < fll_desc_table_header.entry_count; index++) {
 		u32 fll_id;
 
-		memcpy(&fll_desc_table_entry, fll_tbl_entry_ptr,
+		nvgpu_memcpy((u8 *)&fll_desc_table_entry, fll_tbl_entry_ptr,
 				sizeof(struct fll_descriptor_entry_10));
 
 		if (fll_desc_table_entry.fll_device_type == CTRL_CLK_FLL_TYPE_DISABLED) {
@@ -437,9 +439,11 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
 	board_obj_fll_ptr->freq_ctrl_idx = pfll_dev->freq_ctrl_idx;
 	board_obj_fll_ptr->b_skip_pldiv_below_dvco_min =
 		pfll_dev->b_skip_pldiv_below_dvco_min;
-	memcpy(&board_obj_fll_ptr->lut_device, &pfll_dev->lut_device,
+	nvgpu_memcpy((u8 *)&board_obj_fll_ptr->lut_device,
+		(u8 *)&pfll_dev->lut_device,
 		sizeof(struct nv_pmu_clk_lut_device_desc));
-	memcpy(&board_obj_fll_ptr->regime_desc, &pfll_dev->regime_desc,
+	nvgpu_memcpy((u8 *)&board_obj_fll_ptr->regime_desc,
+		(u8 *)&pfll_dev->regime_desc,
 		sizeof(struct nv_pmu_clk_regime_desc));
 	boardobjgrpmask_e32_init(
 		&board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL);
@@ -479,9 +483,11 @@ static int fll_device_init_pmudata_super(struct gk20a *g,
 		pfll_dev->min_freq_vfe_idx;
 	perf_pmu_data->freq_ctrl_idx = pfll_dev->freq_ctrl_idx;
 	perf_pmu_data->b_skip_pldiv_below_dvco_min = pfll_dev->b_skip_pldiv_below_dvco_min;
-	memcpy(&perf_pmu_data->lut_device, &pfll_dev->lut_device,
+	nvgpu_memcpy((u8 *)&perf_pmu_data->lut_device,
+		(u8 *)&pfll_dev->lut_device,
 		sizeof(struct nv_pmu_clk_lut_device_desc));
-	memcpy(&perf_pmu_data->regime_desc, &pfll_dev->regime_desc,
+	nvgpu_memcpy((u8 *)&perf_pmu_data->regime_desc,
+		(u8 *)&pfll_dev->regime_desc,
 		sizeof(struct nv_pmu_clk_regime_desc));
 
 	status = boardobjgrpmask_export(

drivers/gpu/nvgpu/clk/clk_freq_controller.c

@@ -24,6 +24,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "clk.h"
 #include "clk_fll.h"
@@ -208,7 +209,7 @@ static int clk_get_freq_controller_table(struct gk20a *g,
 		goto done;
 	}
 
-	memcpy(&header, pfreq_controller_table_ptr,
+	nvgpu_memcpy((u8 *)&header, pfreq_controller_table_ptr,
 			sizeof(struct vbios_fct_1x_header));
 
 	pclk_freq_controllers->sampling_period_ms = header.sampling_period_ms;
@@ -224,7 +225,7 @@ static int clk_get_freq_controller_table(struct gk20a *g,
 		ptmp_freq_cntr = &freq_controller_data.freq_controller;
 		ptmp_freq_cntr_pi = &freq_controller_data.freq_controller_pi;
 
-		memcpy(&entry, entry_offset,
+		nvgpu_memcpy((u8 *)&entry, entry_offset,
 			sizeof(struct vbios_fct_1x_entry));
 
 		if (!BIOS_GET_FIELD(entry.flags0,

drivers/gpu/nvgpu/clk/clk_prog.c

@@ -25,6 +25,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "clk.h"
 #include "clk_prog.h"
@@ -455,7 +456,7 @@ static int devinit_get_clk_prog_table_1x(struct gk20a *g,
 
 	nvgpu_log_info(g, " ");
 
-	memcpy(&header, clkprogs_tbl_ptr, hszfmt);
+	nvgpu_memcpy((u8 *)&header, clkprogs_tbl_ptr, hszfmt);
 	if (header.header_size < hszfmt) {
 		status = -EINVAL;
 		goto done;
@@ -497,7 +498,7 @@ static int devinit_get_clk_prog_table_1x(struct gk20a *g,
 			(i * (szfmt + (header.slave_entry_count * slaveszfmt) +
 			(header.vf_entry_count * vfszfmt)));
 
-		memcpy(&prog, entry, szfmt);
+		nvgpu_memcpy((u8 *)&prog, entry, szfmt);
 		memset(vfentries, 0xFF,
 			sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) *
 			CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES);
@@ -550,7 +551,7 @@ static int devinit_get_clk_prog_table_1x(struct gk20a *g,
 		case NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_MASTER_TABLE:
 			prog_data.v1x_master.b_o_c_o_v_enabled = false;
 			for (j = 0; j < header.vf_entry_count; j++) {
-				memcpy(&vfprog, vfentry, vfszfmt);
+				nvgpu_memcpy((u8 *)&vfprog, vfentry, vfszfmt);
 
 				vfentries[j].vfe_idx = (u8)vfprog.vfe_idx;
 				if (CTRL_CLK_PROG_1X_SOURCE_FLL ==
@@ -567,7 +568,8 @@ static int devinit_get_clk_prog_table_1x(struct gk20a *g,
 			prog_data.v1x_master.p_vf_entries = vfentries;
 
 			for (j = 0; j < header.slave_entry_count; j++) {
-				memcpy(&slaveprog, slaveentry, slaveszfmt);
+				nvgpu_memcpy((u8 *)&slaveprog, slaveentry,
+					slaveszfmt);
 
 				if (prog_type == NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_MASTER_RATIO) {
 					ratioslaveentries[j].clk_dom_idx =
@@ -727,12 +729,13 @@ static int clk_prog_pmudatainit_1x_master(struct gk20a *g,
 	pset = (struct nv_pmu_clk_clk_prog_1x_master_boardobj_set *)(void *)
 		ppmudata;
 
-	memcpy(pset->vf_entries, pclk_prog_1x_master->p_vf_entries, vfsize);
+	nvgpu_memcpy((u8 *)pset->vf_entries,
+		(u8 *)pclk_prog_1x_master->p_vf_entries, vfsize);
 
 	pset->b_o_c_o_v_enabled = pclk_prog_1x_master->b_o_c_o_v_enabled;
 	pset->source_data = pclk_prog_1x_master->source_data;
 
-	memcpy(&pset->deltas, &pclk_prog_1x_master->deltas,
+	nvgpu_memcpy((u8 *)&pset->deltas, (u8 *)&pclk_prog_1x_master->deltas,
 		(u32) sizeof(struct ctrl_clk_clk_delta));
 
 	return status;
@@ -789,8 +792,8 @@ static int clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g,
 	pset = (struct nv_pmu_clk_clk_prog_1x_master_ratio_boardobj_set *)
 				(void *)ppmudata;
 
-	memcpy(pset->slave_entries,
-		pclk_prog_1x_master_ratio->p_slave_entries, slavesize);
+	nvgpu_memcpy((u8 *)pset->slave_entries,
+		(u8 *)pclk_prog_1x_master_ratio->p_slave_entries, slavesize);
 
 	return status;
 }
@@ -846,8 +849,8 @@ static int clk_prog_pmudatainit_1x_master_table(struct gk20a *g,
 
 	pset = (struct nv_pmu_clk_clk_prog_1x_master_table_boardobj_set *)
 				(void *)ppmudata;
-	memcpy(pset->slave_entries,
-		pclk_prog_1x_master_table->p_slave_entries, slavesize);
+	nvgpu_memcpy((u8 *)pset->slave_entries,
+		(u8 *)pclk_prog_1x_master_table->p_slave_entries, slavesize);
 
 	return status;
 }
@@ -1032,7 +1035,8 @@ static int clk_prog_construct_1x_master(struct gk20a *g,
 	pclkprog->p_vf_entries = (struct ctrl_clk_clk_prog_1x_master_vf_entry *)
 		nvgpu_kzalloc(g, vfsize);
 
-	memcpy(pclkprog->p_vf_entries, ptmpprog->p_vf_entries, vfsize);
+	nvgpu_memcpy((u8 *)pclkprog->p_vf_entries,
+		(u8 *)ptmpprog->p_vf_entries, vfsize);
 
 	pclkprog->b_o_c_o_v_enabled = ptmpprog->b_o_c_o_v_enabled;
 
@@ -1126,7 +1130,8 @@ static int clk_prog_construct_1x_master_ratio(struct gk20a *g,
 	memset(pclkprog->p_slave_entries, CTRL_CLK_CLK_DOMAIN_INDEX_INVALID,
 		slavesize);
 
-	memcpy(pclkprog->p_slave_entries, ptmpprog->p_slave_entries, slavesize);
+	nvgpu_memcpy((u8 *)pclkprog->p_slave_entries,
+		(u8 *)ptmpprog->p_slave_entries, slavesize);
 
 	return status;
 }
@@ -1217,7 +1222,8 @@ static int clk_prog_construct_1x_master_table(struct gk20a *g,
 	memset(pclkprog->p_slave_entries, CTRL_CLK_CLK_DOMAIN_INDEX_INVALID,
 		slavesize);
 
-	memcpy(pclkprog->p_slave_entries, ptmpprog->p_slave_entries, slavesize);
+	nvgpu_memcpy((u8 *)pclkprog->p_slave_entries,
+		(u8 *)ptmpprog->p_slave_entries, slavesize);
 
 exit:
 	if (status) {

drivers/gpu/nvgpu/clk/clk_vf_point.c

@@ -23,6 +23,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "clk.h"
 #include "clk_vf_point.h"
@@ -382,7 +383,7 @@ static int clk_vf_point_update(struct gk20a *g,
 		return -EINVAL;
 	}
 	/* now copy VF pair */
-	memcpy(&pclk_vf_point->pair, &pstatus->pair,
+	nvgpu_memcpy((u8 *)&pclk_vf_point->pair, (u8 *)&pstatus->pair,
 		sizeof(struct ctrl_clk_vf_pair));
 	return 0;
 }

drivers/gpu/nvgpu/clk/clk_vin.c

@@ -26,6 +26,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/boardobjgrp.h>
 #include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/string.h>
 
 #include "ctrl/ctrlvolt.h"
 
@@ -286,7 +287,7 @@ static int devinit_get_vin_device_table(struct gk20a *g,
 		goto done;
 	}
 
-	memcpy(&vin_desc_table_header, vin_table_ptr,
+	nvgpu_memcpy((u8 *)&vin_desc_table_header, vin_table_ptr,
 	       sizeof(struct vin_descriptor_header_10));
 
 	pvinobjs->calibration_rev_vbios =
@@ -329,7 +330,7 @@ static int devinit_get_vin_device_table(struct gk20a *g,
 	/* Read table entries*/
 	vin_tbl_entry_ptr = vin_table_ptr + vin_desc_table_header.header_sizee;
 	for (index = 0; index < vin_desc_table_header.entry_count; index++) {
-		memcpy(&vin_desc_table_entry, vin_tbl_entry_ptr,
+		nvgpu_memcpy((u8 *)&vin_desc_table_entry, vin_tbl_entry_ptr,
 		       sizeof(struct vin_descriptor_entry_10));
 
 		if (vin_desc_table_entry.vin_device_type == CTRL_CLK_VIN_TYPE_DISABLED) {

drivers/gpu/nvgpu/common/string.c

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <nvgpu/string.h>
+
+void
+nvgpu_memcpy(u8 *destb, const u8 *srcb, size_t n)
+{
+	(void) memcpy(destb, srcb, n);
+}
+
+int
+nvgpu_memcmp(const u8 *b1, const u8 *b2, size_t n)
+{
+	return memcmp(b1, b2, n);
+}

drivers/gpu/nvgpu/gk20a/gr_gk20a.c

@@ -45,6 +45,7 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/channel.h>
 #include <nvgpu/unit.h>
+#include <nvgpu/string.h>
 
 #include "gr_gk20a.h"
 #include "gk20a/fecs_trace_gk20a.h"
@@ -3826,11 +3827,13 @@ int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr,
 			c_tbl = &gr->zbc_col_tbl[i];
 
 			if ((c_tbl->ref_cnt != 0U) &&
-			    (c_tbl->format == zbc_val->format) &&
-			    (memcmp(c_tbl->color_ds, zbc_val->color_ds,
-				sizeof(zbc_val->color_ds)) == 0) &&
-			    (memcmp(c_tbl->color_l2, zbc_val->color_l2,
-				sizeof(zbc_val->color_l2)) == 0)) {
+				(c_tbl->format == zbc_val->format) &&
+				(nvgpu_memcmp((u8 *)c_tbl->color_ds,
+					(u8 *)zbc_val->color_ds,
+					sizeof(zbc_val->color_ds)) == 0) &&
+				(nvgpu_memcmp((u8 *)c_tbl->color_l2,
+					(u8 *)zbc_val->color_l2,
+					sizeof(zbc_val->color_l2)) == 0)) {
 
 				added = true;
 				c_tbl->ref_cnt++;

drivers/gpu/nvgpu/include/nvgpu/string.h

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_STRING_H
+#define NVGPU_STRING_H
+
+#include <nvgpu/types.h>
+
+#ifdef __KERNEL__
+#include <linux/string.h>
+#endif
+
+/**
+ * nvgpu_memcpy - Copy memory buffer
+ *
+ * @destb - Buffer into which data is to be copied.
+ * @srcb - Buffer from which data is to be copied.
+ * @n - Number of bytes to copy from src buffer to dest buffer.
+ *
+ * Copy memory from source buffer to destination buffer.
+ */
+void nvgpu_memcpy(u8 *destb, const u8 *srcb, size_t n);
+
+/**
+ * nvgpu_memcmp - Compare memory buffers
+ *
+ * @b1 - First buffer to use in memory comparison.
+ * @b2 - Second buffer to use in memory comparison.
+ * @n - Number of bytes to compare between buffer1 and buffer2.
+ *
+ * Compare the first n bytes of two memory buffers.  If the contents of the
+ * two buffers match then zero is returned.  If the contents of b1 are less
+ * than b2 then a value less than zero is returned.  If the contents of b1
+ * are greater than b2 then a value greater than zero is returned.
+ */
+int nvgpu_memcmp(const u8 *b1, const u8 *b2, size_t n);
+
+#endif /* NVGPU_STRING_H */