gpu: nvgpu: add MISRA-compliant string ops

Add nvgpu_memcpy/nvgpu_memcmp which are MISRA-compliant versions
(Rule 21.15) of memcpy/memcmp.

Also convert some clk/gr calls over to use the new routines;
all of the remaining calls will be converted in subsequent patches.

JIRA NVGPU-849

Change-Id: Ib3a602cd08886764ba9a50285462a8b07bfb18ba
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919470
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-10-04 11:34:51 -07:00
committed by mobile promotions
parent f96d229e70
commit c08b987db3
11 changed files with 147 additions and 40 deletions

View File

@@ -24,6 +24,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "clk.h"
#include "clk_fll.h"
@@ -208,7 +209,7 @@ static int clk_get_freq_controller_table(struct gk20a *g,
goto done;
}
memcpy(&header, pfreq_controller_table_ptr,
nvgpu_memcpy((u8 *)&header, pfreq_controller_table_ptr,
sizeof(struct vbios_fct_1x_header));
pclk_freq_controllers->sampling_period_ms = header.sampling_period_ms;
@@ -224,7 +225,7 @@ static int clk_get_freq_controller_table(struct gk20a *g,
ptmp_freq_cntr = &freq_controller_data.freq_controller;
ptmp_freq_cntr_pi = &freq_controller_data.freq_controller_pi;
memcpy(&entry, entry_offset,
nvgpu_memcpy((u8 *)&entry, entry_offset,
sizeof(struct vbios_fct_1x_entry));
if (!BIOS_GET_FIELD(entry.flags0,