diff --git a/drivers/gpu/nvgpu/common/top/top_gv100.c b/drivers/gpu/nvgpu/common/top/top_gv100.c
index 1a7137fb5..01bdcd83d 100644
--- a/drivers/gpu/nvgpu/common/top/top_gv100.c
+++ b/drivers/gpu/nvgpu/common/top/top_gv100.c
@@ -64,3 +64,11 @@ void gv100_top_set_nvhsclk_ctrl_swap_clk_nvl(struct gk20a *g, u32 val)
 				top_nvhsclk_ctrl_swap_clk_nvl_f(val));
 	nvgpu_writel(g, top_nvhsclk_ctrl_r(), reg);
 }
+
+u32 gv100_top_get_max_fbpas_count(struct gk20a *g)
+{
+	u32 tmp;
+
+	tmp = nvgpu_readl(g, top_num_fbpas_r());
+	return top_num_fbpas_value_v(tmp);
+}
diff --git a/drivers/gpu/nvgpu/common/top/top_gv100.h b/drivers/gpu/nvgpu/common/top/top_gv100.h
index 885b7814b..4cafd3db5 100644
--- a/drivers/gpu/nvgpu/common/top/top_gv100.h
+++ b/drivers/gpu/nvgpu/common/top/top_gv100.h
@@ -34,4 +34,6 @@ void gv100_top_set_nvhsclk_ctrl_e_clk_nvl(struct gk20a *g, u32 val);
 u32 gv100_top_get_nvhsclk_ctrl_swap_clk_nvl(struct gk20a *g);
 void gv100_top_set_nvhsclk_ctrl_swap_clk_nvl(struct gk20a *g, u32 val);
 
+u32 gv100_top_get_max_fbpas_count(struct gk20a *g);
+
 #endif
diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.c b/drivers/gpu/nvgpu/gv100/gr_gv100.c
index 38397ecd1..66cf0e1c1 100644
--- a/drivers/gpu/nvgpu/gv100/gr_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/gr_gv100.c
@@ -38,7 +38,6 @@
 
 #include <nvgpu/hw/gv100/hw_gr_gv100.h>
 #include <nvgpu/hw/gv100/hw_proj_gv100.h>
-#include <nvgpu/hw/gv100/hw_top_gv100.h>
 #include <nvgpu/hw/gv100/hw_perf_gv100.h>
 
 
@@ -365,10 +364,9 @@ u32 gr_gv100_get_patch_slots(struct gk20a *g)
 static u32 gr_gv100_get_active_fpba_mask(struct gk20a *g)
 {
 	u32 active_fbpa_mask;
-	u32 num_fbpas, val;
+	u32 num_fbpas;
 
-	val = nvgpu_readl(g, top_num_fbpas_r());
-	num_fbpas = top_num_fbpas_value_v(val);
+	num_fbpas = g->ops.top.get_max_fbpas_count(g);
 
 	/*
 	 * Read active fbpa mask from fuse
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index b835eea38..0ab6eb103 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -1163,6 +1163,7 @@ static const struct gpu_ops gv100_ops = {
 		.get_max_tpc_per_gpc_count =
 			gm20b_top_get_max_tpc_per_gpc_count,
 		.get_max_fbps_count = gm20b_top_get_max_fbps_count,
+		.get_max_fbpas_count = gv100_top_get_max_fbpas_count,
 		.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
 		.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
 	},
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 0d111e1e3..c106e2ba0 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -1619,6 +1619,7 @@ struct gpu_ops {
 		u32 (*get_max_gpc_count)(struct gk20a *g);
 		u32 (*get_max_tpc_per_gpc_count)(struct gk20a *g);
 		u32 (*get_max_fbps_count)(struct gk20a *g);
+		u32 (*get_max_fbpas_count)(struct gk20a *g);
 		u32 (*get_max_ltc_per_fbp)(struct gk20a *g);
 		u32 (*get_max_lts_per_ltc)(struct gk20a *g);
 	} top;
diff --git a/drivers/gpu/nvgpu/tu104/hal_tu104.c b/drivers/gpu/nvgpu/tu104/hal_tu104.c
index e6d129af9..0f81563a2 100644
--- a/drivers/gpu/nvgpu/tu104/hal_tu104.c
+++ b/drivers/gpu/nvgpu/tu104/hal_tu104.c
@@ -76,6 +76,7 @@
 #include "common/nvdec/nvdec_tu104.h"
 #include "common/top/top_gm20b.h"
 #include "common/top/top_gp10b.h"
+#include "common/top/top_gv100.h"
 #include "common/nvlink/init/device_reginit_gv100.h"
 #include "common/nvlink/intr_and_err_handling_gv100.h"
 #include "hal/nvlink/minion_gv100.h"
@@ -1209,6 +1210,7 @@ static const struct gpu_ops tu104_ops = {
 		.get_max_tpc_per_gpc_count =
 			gm20b_top_get_max_tpc_per_gpc_count,
 		.get_max_fbps_count = gm20b_top_get_max_fbps_count,
+		.get_max_fbpas_count = gv100_top_get_max_fbpas_count,
 		.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
 		.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
 	},