gpu: nvgpu: fifo: fix MISRA 10.3 violations

MISRA Rule 10.3 prohibits assigning objects of different essential or
narrower type. This fixes MISRA 10.3 violations in the common/fifo unit.

JIRA NVGPU-3023

Change-Id: Ibab6704e8d3cffd37c6c0e31ba6fc6c0bb7b517b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2087812
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-04-01 11:07:04 -04:00
committed by mobile promotions
parent 295ff82fc9
commit c0b65e8b05
13 changed files with 23 additions and 12 deletions

View File

@@ -35,6 +35,7 @@
#include <nvgpu/firmware.h>
#include <nvgpu/os_sched.h>
#include <nvgpu/channel.h>
#include <nvgpu/runlist.h>
#include <nvgpu/utils.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/string.h>
@@ -1339,7 +1340,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
ch = gk20a_open_new_channel_with_cb(g, gk20a_cde_finished_ctx_cb,
cde_ctx,
-1,
RUNLIST_INVALID_ID,
false);
if (!ch) {
nvgpu_warn(g, "cde: gk20a channel not available");