gpu: nvgpu: unit: add test levels

Add -t/--test-level option for the unit test framework. This
correlates with the test plan levels in GVS. L0 tests are a subset of
the L1 tests. Currently, only test levels 0 and 1 are supported.

The test output has been updated to display skipped tests. Skipped
tests are not included in the test dump.

JIRA NVGPU-2251

Change-Id: Icc2ff19a81529be8526e89f70983e96040390e00
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2085280
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-03-29 11:59:04 -04:00
committed by mobile promotions
parent f7860833f1
commit c0d5a715bd
25 changed files with 293 additions and 218 deletions

View File

@@ -1037,63 +1037,63 @@ static int test_pd_cache_env_init(struct unit_module *m,
}
struct unit_module_test pd_cache_tests[] = {
UNIT_TEST(env_init, test_pd_cache_env_init, NULL),
UNIT_TEST(init, test_pd_cache_init, NULL),
UNIT_TEST(fini, test_pd_cache_fini, NULL),
UNIT_TEST(env_init, test_pd_cache_env_init, NULL, 0),
UNIT_TEST(init, test_pd_cache_init, NULL, 0),
UNIT_TEST(fini, test_pd_cache_fini, NULL, 0),
/*
* Requirement verification tests.
*/
UNIT_TEST_REQ("NVGPU-RQCD-68.C1,2", PD_CACHE_REQ1_UID, "V4",
valid_alloc, test_pd_cache_valid_alloc, NULL),
valid_alloc, test_pd_cache_valid_alloc, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-68.C3", PD_CACHE_REQ1_UID, "V4",
pd_packing, test_per_pd_size, do_test_pd_cache_packing_size),
pd_packing, test_per_pd_size, do_test_pd_cache_packing_size, 0),
UNIT_TEST_REQ("NVGPU-RQCD-118.C1", PD_CACHE_REQ2_UID, "V3",
pd_reusability, test_per_pd_size, do_test_pd_reusability),
pd_reusability, test_per_pd_size, do_test_pd_reusability, 0),
UNIT_TEST_REQ("NVGPU-RQCD-122.C1", PD_CACHE_REQ3_UID, "V3",
write, test_pd_write, NULL),
write, test_pd_write, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-123.C1", PD_CACHE_REQ4_UID, "V2",
gpu_address, test_gpu_address, NULL),
gpu_address, test_gpu_address, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-126.C1,2", PD_CACHE_REQ5_UID, "V1",
offset_comp, test_offset_computation, NULL),
offset_comp, test_offset_computation, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-124.C1", PD_CACHE_REQ6_UID, "V3",
init_deinit, test_init_deinit, NULL),
init_deinit, test_init_deinit, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-155.C1", PD_CACHE_REQ7_UID, "V2",
multi_init, test_init_deinit, NULL),
multi_init, test_init_deinit, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-125.C1", PD_CACHE_REQ8_UID, "V2",
deinit, test_init_deinit, NULL),
deinit, test_init_deinit, NULL, 0),
/*
* Direct allocs.
*/
UNIT_TEST(alloc_direct_1xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1xPAGE),
UNIT_TEST(alloc_direct_1024xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE),
UNIT_TEST(alloc_direct_1x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1x16PAGE),
UNIT_TEST(alloc_direct_1024x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1024x16PAGE),
UNIT_TEST(alloc_direct_1024xPAGE_x32x24, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x32x24),
UNIT_TEST(alloc_direct_1024xPAGE_x16x4, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x4),
UNIT_TEST(alloc_direct_1024xPAGE_x16x15, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x15),
UNIT_TEST(alloc_direct_1024xPAGE_x16x1, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x1),
UNIT_TEST(alloc_direct_1xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1xPAGE, 0),
UNIT_TEST(alloc_direct_1024xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE, 0),
UNIT_TEST(alloc_direct_1x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1x16PAGE, 0),
UNIT_TEST(alloc_direct_1024x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1024x16PAGE, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x32x24, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x32x24, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x4, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x4, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x15, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x15, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x1, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x1, 0),
/*
* Cached allocs.
*/
UNIT_TEST(alloc_1x256B, test_pd_cache_alloc_gen, &alloc_1x256B),
UNIT_TEST(alloc_1x512B, test_pd_cache_alloc_gen, &alloc_1x512B),
UNIT_TEST(alloc_1x1024B, test_pd_cache_alloc_gen, &alloc_1x1024B),
UNIT_TEST(alloc_1x2048B, test_pd_cache_alloc_gen, &alloc_1x2048B),
UNIT_TEST(alloc_1024x256B_x16x15, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x15),
UNIT_TEST(alloc_1024x256B_x16x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x1),
UNIT_TEST(alloc_1024x256B_x32x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x32x1),
UNIT_TEST(alloc_1024x256B_x11x3, test_pd_cache_alloc_gen, &alloc_1024x256B_x11x3),
UNIT_TEST(alloc_1x256B, test_pd_cache_alloc_gen, &alloc_1x256B, 0),
UNIT_TEST(alloc_1x512B, test_pd_cache_alloc_gen, &alloc_1x512B, 0),
UNIT_TEST(alloc_1x1024B, test_pd_cache_alloc_gen, &alloc_1x1024B, 0),
UNIT_TEST(alloc_1x2048B, test_pd_cache_alloc_gen, &alloc_1x2048B, 0),
UNIT_TEST(alloc_1024x256B_x16x15, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x15, 0),
UNIT_TEST(alloc_1024x256B_x16x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x1, 0),
UNIT_TEST(alloc_1024x256B_x32x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x32x1, 0),
UNIT_TEST(alloc_1024x256B_x11x3, test_pd_cache_alloc_gen, &alloc_1024x256B_x11x3, 0),
/*
* Error path testing.
*/
UNIT_TEST(free_empty, test_pd_free_empty_pd, NULL),
UNIT_TEST(invalid_pd_alloc, test_pd_alloc_invalid_input, NULL),
UNIT_TEST(alloc_direct_oom, test_pd_alloc_direct_fi, NULL),
UNIT_TEST(alloc_oom, test_pd_alloc_fi, NULL),
UNIT_TEST(free_empty, test_pd_free_empty_pd, NULL, 0),
UNIT_TEST(invalid_pd_alloc, test_pd_alloc_invalid_input, NULL, 0),
UNIT_TEST(alloc_direct_oom, test_pd_alloc_direct_fi, NULL, 0),
UNIT_TEST(alloc_oom, test_pd_alloc_fi, NULL, 0),
};
UNIT_MODULE(pd_cache, pd_cache_tests, UNIT_PRIO_NVGPU_TEST);