mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
gpu: nvgpu: Add subctx programming for MIG
This CL covers the following code changes, 1) Added api to init inst_block for more than one subctxs. 2) Added logic to limit the subctx bind based on max. VEID count allocated to a gr instance. 3) Renamed nvgpu_grmgr_get_gr_runlist_id. JIRA NVGPU-5647 Change-Id: Ifec8164a9e5f46fbd0538c3dd50e19ee63667a54 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2418463 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Alex Waterman
parent
d2bb5df3c7
commit
c0e2dc5b74
@@ -1178,4 +1178,11 @@ static inline void nvgpu_channel_set_wdt_debug_dump(struct nvgpu_channel *ch,
|
||||
bool dump) {}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Get maximum sub context count.
|
||||
*
|
||||
* @param ch [in] Channel pointer.
|
||||
*/
|
||||
u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -540,6 +540,23 @@ struct gops_mm {
|
||||
void (*init_inst_block)(struct nvgpu_mem *inst_block,
|
||||
struct vm_gk20a *vm, u32 big_page_size);
|
||||
|
||||
/**
|
||||
* @brief HAL to initialize the instance block memory.
|
||||
* (for more than one subctx)
|
||||
*
|
||||
* @param inst_block [in] Pointer to instance block memory.
|
||||
* @param vm [in] Pointer to virtual memory context.
|
||||
* @param big_page_size [in] Big page size supported by GMMU.
|
||||
* @param max_subctx_count [in] Max number of sub context.
|
||||
*
|
||||
* Initializes the instance block memory:
|
||||
* - Configures the pdb base, big page size and
|
||||
* sub context's pdb base in context's instance block memory.
|
||||
*/
|
||||
void (*init_inst_block_for_subctxs)(struct nvgpu_mem *inst_block,
|
||||
struct vm_gk20a *vm, u32 big_page_size,
|
||||
u32 max_subctx_count);
|
||||
|
||||
/**
|
||||
* @brief HAL to get the maximum flush retry counts.
|
||||
*
|
||||
|
||||
@@ -98,6 +98,7 @@ struct gops_ramin {
|
||||
* @param pdb_mem [in] Memory descriptor of PDB.
|
||||
* @param replayable [in] Indicates if errors are replayable
|
||||
* for this Instance Block.
|
||||
* @param max_subctx_count [in] Max number of sub context.
|
||||
*
|
||||
* This HAL configures PDB for all sub-contexts of Instance Block:
|
||||
* - Get max number of sub-contexts from HW.
|
||||
@@ -116,7 +117,7 @@ struct gops_ramin {
|
||||
void (*init_subctx_pdb)(struct gk20a *g,
|
||||
struct nvgpu_mem *inst_block,
|
||||
struct nvgpu_mem *pdb_mem,
|
||||
bool replayable);
|
||||
bool replayable, u32 max_subctx_count);
|
||||
|
||||
/**
|
||||
* @brief Instance Block shift.
|
||||
|
||||
@@ -42,7 +42,8 @@ u32 nvgpu_grmgr_get_gr_gpc_phys_id(struct gk20a *g, u32 gr_instance_id,
|
||||
u32 nvgpu_grmgr_get_gr_instance_id(struct gk20a *g, u32 gpu_instance_id);
|
||||
bool nvgpu_grmgr_is_valid_runlist_id(struct gk20a *g,
|
||||
u32 gpu_instance_id, u32 runlist_id);
|
||||
u32 nvgpu_grmgr_get_gr_runlist_id(struct gk20a *g, u32 gpu_instance_id);
|
||||
u32 nvgpu_grmgr_get_gpu_instance_runlist_id(struct gk20a *g,
|
||||
u32 gpu_instance_id);
|
||||
u32 nvgpu_grmgr_get_gr_instance_id_for_syspipe(struct gk20a *g,
|
||||
u32 gr_syspipe_id);
|
||||
u32 nvgpu_grmgr_get_gpu_instance_max_veid_count(struct gk20a *g,
|
||||
|
||||
Reference in New Issue
Block a user