gpu: nvgpu: Add subctx programming for MIG

This CL covers the following code changes,
1) Added api to init inst_block for more than one subctxs.
2) Added logic to limit the subctx bind based on
   max. VEID count allocated to a gr instance.
3) Renamed nvgpu_grmgr_get_gr_runlist_id.

JIRA NVGPU-5647

Change-Id: Ifec8164a9e5f46fbd0538c3dd50e19ee63667a54
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2418463
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2020-09-23 15:42:07 +05:30
committed by Alex Waterman
parent d2bb5df3c7
commit c0e2dc5b74
23 changed files with 133 additions and 31 deletions

View File

@@ -501,7 +501,7 @@ test_channel_suspend_resume_serviceable_chs.suspend_resume=0
test_channel_sw_quiesce.sw_quiesce=0
test_fifo_init_support.init_support=0
test_fifo_remove_support.remove_support=0
test_nvgpu_channel_commit_va.channel_commit_va=0
test_nvgpu_channel_commit_va.channel_commit_va=2
test_nvgpu_get_gpfifo_entry_size.get_gpfifo_entry_size=0
test_trace_write_pushbuffers.trace_write_pushbuffers=0
@@ -1041,7 +1041,7 @@ test_gm20b_ramin_set_big_page_size.set_big_page_size=0
test_gp10b_ramin_init_pdb.init_pdb=0
[ramin_gv11b_fusa]
test_gv11b_ramin_init_subctx_pdb.init_subctx_pdb=0
test_gv11b_ramin_init_subctx_pdb.init_subctx_pdb=2
test_gv11b_ramin_set_eng_method_buffer.set_eng_method_buf=0
test_gv11b_ramin_set_gr_ptr.set_gr_ptr=0
@@ -1083,7 +1083,7 @@ test_map_buffer_error_cases.map_buffer_error_cases=0
test_nvgpu_vm_alloc_va.nvgpu_vm_alloc_va=0
test_vm_area_error_cases.vm_area_error_cases=0
test_vm_aspace_id.vm_aspace_id=0
test_vm_bind.vm_bind=0
test_vm_bind.vm_bind=2
test_gk20a_from_vm.gk20a_from_vm=0
test_vm_pde_coverage_bit_count.vm_pde_coverage_bit_count=0
test_nvgpu_insert_mapped_buf.nvgpu_insert_mapped_buf=0

View File

@@ -1979,7 +1979,7 @@ struct unit_module_test nvgpu_channel_tests[] = {
UNIT_TEST(channel_put_warn, test_channel_put_warn, &unit_ctx, 0),
UNIT_TEST(referenceable_cleanup, test_ch_referenceable_cleanup, &unit_ctx, 0),
UNIT_TEST(abort_cleanup, test_channel_abort_cleanup, &unit_ctx, 0),
UNIT_TEST(channel_commit_va, test_nvgpu_channel_commit_va, &unit_ctx, 0),
UNIT_TEST(channel_commit_va, test_nvgpu_channel_commit_va, &unit_ctx, 2),
UNIT_TEST(get_gpfifo_entry_size, test_nvgpu_get_gpfifo_entry_size, &unit_ctx, 0),
UNIT_TEST(trace_write_pushbuffers, test_trace_write_pushbuffers, &unit_ctx, 0),
UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),

View File

@@ -133,7 +133,7 @@ static int stub_ramfc_commit_userd(struct nvgpu_channel *ch)
static void stub_ramin_init_subctx_pdb(struct gk20a *g,
struct nvgpu_mem *inst_block, struct nvgpu_mem *pdb_mem,
bool replayable)
bool replayable, u32 max_subctx_count)
{
global_count++;
}

View File

@@ -147,7 +147,7 @@ int test_gv11b_ramin_init_subctx_pdb(struct unit_module *m, struct gk20a *g,
}
gv11b_ramin_init_subctx_pdb(g, &inst_block, &pdb_mem,
replayable);
replayable, 64);
for (subctx_id = 0; subctx_id < max_subctx_count; subctx_id++) {
addr_lo = ram_in_sc_page_dir_base_vol_w(subctx_id);
@@ -215,7 +215,7 @@ done:
struct unit_module_test ramin_gv11b_fusa_tests[] = {
UNIT_TEST(set_gr_ptr, test_gv11b_ramin_set_gr_ptr, NULL, 0),
UNIT_TEST(init_subctx_pdb, test_gv11b_ramin_init_subctx_pdb, NULL, 0),
UNIT_TEST(init_subctx_pdb, test_gv11b_ramin_init_subctx_pdb, NULL, 2),
UNIT_TEST(set_eng_method_buf, test_gv11b_ramin_set_eng_method_buffer, NULL, 0),
};

View File

@@ -2076,7 +2076,7 @@ struct unit_module_test vm_tests[] = {
UNIT_TEST(init_error_paths, test_init_error_paths, NULL, 0),
UNIT_TEST(map_buffer_error_cases, test_map_buffer_error_cases, NULL, 0),
UNIT_TEST(nvgpu_vm_alloc_va, test_nvgpu_vm_alloc_va, NULL, 0),
UNIT_TEST(vm_bind, test_vm_bind, NULL, 0),
UNIT_TEST(vm_bind, test_vm_bind, NULL, 2),
UNIT_TEST(vm_aspace_id, test_vm_aspace_id, NULL, 0),
UNIT_TEST(vm_area_error_cases, test_vm_area_error_cases, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-45.C2",