gpu: nvgpu: channel MISRA fix for Rule 17.7

Check return value of below function and add nvgpu_assert.
nvgpu_assert is warning on linux but a system halt on safety
builds.
nvgpu_preempt_channel

JIRA NVGPU-3388

Change-Id: Id60d10c0d1593a6b798a037b9ec0efe6c4d20dd5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115762
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-09 09:59:19 -07:00
committed by mobile promotions
parent 7ebb9d85d9
commit c0e725a576

View File

@@ -1176,7 +1176,7 @@ int nvgpu_channel_set_syncpt(struct nvgpu_channel *ch)
gk20a_disable_channel_tsg(g, ch);
/* preempt the channel */
WARN_ON(nvgpu_preempt_channel(g, ch) != 0);
nvgpu_assert(nvgpu_preempt_channel(g, ch) == 0);
g->ops.ramfc.set_syncpt(ch, new_syncpt);
}
@@ -2382,8 +2382,6 @@ clean_up_mutex:
return err;
}
/* in this context the "channel" is the host1x channel which
* maps to *all* gk20a channels */
int nvgpu_channel_suspend_all_serviceable_ch(struct gk20a *g)
{
struct nvgpu_fifo *f = &g->fifo;
@@ -2407,7 +2405,7 @@ int nvgpu_channel_suspend_all_serviceable_ch(struct gk20a *g)
/* disable channel */
gk20a_disable_channel_tsg(g, ch);
/* preempt the channel */
nvgpu_preempt_channel(g, ch);
nvgpu_assert(nvgpu_preempt_channel(g, ch) == 0);
/* wait for channel update notifiers */
if (g->os_channel.work_completion_cancel_sync != NULL) {
g->os_channel.work_completion_cancel_sync(ch);