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gpu: nvgpu: Fix for MISRA 10.1 violation

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- The expression "0" of non-boolean essential type is being interpreted
  as a boolean value for the operator "!"

JIRA NVGPU-6058

Change-Id: Iff9f81dcca5b4aa6636b688888010d5c964b93c1
Signed-off-by: Seeta Rama Raju <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2417642
(cherry picked from commit dcc8cdbc09e3db3500be7a350295bee58808a62a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2434188
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seeta Rama Raju
2020-09-22 10:02:30 +05:30
committed by Alex Waterman
parent 61678bd1f9
commit c1173d11df
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nvgpu/include/nvgpu/bug.h
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@@ -53,7 +53,7 @@
({ \ ({ \
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 14_4), "Bug 2277532") \ NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 14_4), "Bug 2277532") \
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 15_6), "Bug 2277532") \ NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 15_6), "Bug 2277532") \
BUG_ON(!(cond)); \ BUG_ON((cond) == ((bool)(0 != 0))); \
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 14_4)) \ NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 14_4)) \
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 15_6)) \ NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 15_6)) \
}) })
@@ -66,7 +66,7 @@
*/ */
#define nvgpu_do_assert() \ #define nvgpu_do_assert() \
NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 10_3), "Bug 2623654") \ NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 10_3), "Bug 2623654") \
nvgpu_assert(false) nvgpu_assert((bool)(0 != 0))
/* /*
* Define compile-time assert check. * Define compile-time assert check.