gpu: nvgpu: move mclk related functions to clk

Move mclk related functions be moved to clk structure instead of
pmu. We want to keep pmu only for basic pmu interaction and
split clk, lpwr etc.

Bug 1921094

Change-Id: I32394bc0e6d3657dfbd34dbcf19c9af56c12e194
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master/r/1506586
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2017-06-21 11:13:22 -07:00
committed by mobile promotions
parent a89c3876c7
commit c12eb17340
6 changed files with 16 additions and 16 deletions

View File

@@ -1989,7 +1989,7 @@ static int nvgpu_clk_arb_change_vf_point(struct gk20a *g, u16 gpc2clk_target,
/* descending */ /* descending */
if (voltuv < arb->voltuv_actual) { if (voltuv < arb->voltuv_actual) {
status = g->ops.pmu.mclk_change(g, mclk_target); status = g->ops.clk.mclk_change(g, mclk_target);
if (status < 0) if (status < 0)
return status; return status;
@@ -2009,7 +2009,7 @@ static int nvgpu_clk_arb_change_vf_point(struct gk20a *g, u16 gpc2clk_target,
if (status < 0) if (status < 0)
return status; return status;
status = g->ops.pmu.mclk_change(g, mclk_target); status = g->ops.clk.mclk_change(g, mclk_target);
if (status < 0) if (status < 0)
return status; return status;
} }

View File

@@ -137,8 +137,8 @@ int gk20a_prepare_poweroff(struct gk20a *g)
ret |= gk20a_mm_suspend(g); ret |= gk20a_mm_suspend(g);
ret |= gk20a_fifo_suspend(g); ret |= gk20a_fifo_suspend(g);
if (g->ops.pmu.mclk_deinit) if (g->ops.clk.mclk_deinit)
g->ops.pmu.mclk_deinit(g); g->ops.clk.mclk_deinit(g);
/* Disable GPCPLL */ /* Disable GPCPLL */
if (g->ops.clk.suspend_clk_support) if (g->ops.clk.suspend_clk_support)
@@ -273,8 +273,8 @@ int gk20a_finalize_poweron(struct gk20a *g)
goto done; goto done;
} }
if (g->ops.pmu.mclk_init) { if (g->ops.clk.mclk_init) {
err = g->ops.pmu.mclk_init(g); err = g->ops.clk.mclk_init(g);
if (err) { if (err) {
nvgpu_err(g, "failed to set mclk"); nvgpu_err(g, "failed to set mclk");
/* Indicate error dont goto done */ /* Indicate error dont goto done */

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@@ -772,9 +772,6 @@ struct gpu_ops {
void *lsfm, u32 *p_bl_gen_desc_size); void *lsfm, u32 *p_bl_gen_desc_size);
int (*flcn_populate_bl_dmem_desc)(struct gk20a *g, int (*flcn_populate_bl_dmem_desc)(struct gk20a *g,
void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
int (*mclk_init)(struct gk20a *g);
void (*mclk_deinit)(struct gk20a *g);
int (*mclk_change)(struct gk20a *g, u16 val);
void (*handle_ext_irq)(struct gk20a *g, u32 intr); void (*handle_ext_irq)(struct gk20a *g, u32 intr);
void (*set_irqmask)(struct gk20a *g); void (*set_irqmask)(struct gk20a *g);
u32 lspmuwprinitdone; u32 lspmuwprinitdone;
@@ -802,6 +799,9 @@ struct gpu_ops {
int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val); int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val);
int (*get_pll_debug_data)(struct gk20a *g, int (*get_pll_debug_data)(struct gk20a *g,
struct nvgpu_clk_pll_debug_data *d); struct nvgpu_clk_pll_debug_data *d);
int (*mclk_init)(struct gk20a *g);
void (*mclk_deinit)(struct gk20a *g);
int (*mclk_change)(struct gk20a *g, u16 val);
} clk; } clk;
struct { struct {
u32 (*get_arbiter_clk_domains)(struct gk20a *g); u32 (*get_arbiter_clk_domains)(struct gk20a *g);

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@@ -30,6 +30,8 @@
#include "clk_gp106.h" #include "clk_gp106.h"
#include "clk/clk_arb.h" #include "clk/clk_arb.h"
#include "gp106/pmu_mclk_gp106.h"
#include <nvgpu/hw/gp106/hw_trim_gp106.h> #include <nvgpu/hw/gp106/hw_trim_gp106.h>
#define gk20a_dbg_clk(fmt, arg...) \ #define gk20a_dbg_clk(fmt, arg...) \
@@ -281,4 +283,7 @@ void gp106_init_clk_ops(struct gpu_ops *gops) {
gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz; gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz;
gops->clk.measure_freq = gp106_clk_measure_freq; gops->clk.measure_freq = gp106_clk_measure_freq;
gops->clk.suspend_clk_support = gp106_suspend_clk_support; gops->clk.suspend_clk_support = gp106_suspend_clk_support;
gops->clk.mclk_init = gp106_mclk_init;
gops->clk.mclk_change = gp106_mclk_change;
gops->clk.mclk_deinit = gp106_mclk_deinit;
} }

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@@ -20,7 +20,6 @@
#include "gm20b/pmu_gm20b.h" #include "gm20b/pmu_gm20b.h"
#include "gp10b/pmu_gp10b.h" #include "gp10b/pmu_gp10b.h"
#include "gp106/pmu_gp106.h" #include "gp106/pmu_gp106.h"
#include "gp106/pmu_mclk_gp106.h"
#include "gp106/acr_gp106.h" #include "gp106/acr_gp106.h"
#include "clk/clk_mclk.h" #include "clk/clk_mclk.h"
@@ -331,9 +330,6 @@ void gp106_init_pmu_ops(struct gpu_ops *gops)
gops->pmu.pmu_lpwr_disable_pg = nvgpu_lpwr_disable_pg; gops->pmu.pmu_lpwr_disable_pg = nvgpu_lpwr_disable_pg;
gops->pmu.pmu_pg_param_post_init = nvgpu_lpwr_post_init; gops->pmu.pmu_pg_param_post_init = nvgpu_lpwr_post_init;
gops->pmu.dump_secure_fuses = NULL; gops->pmu.dump_secure_fuses = NULL;
gops->pmu.mclk_init = gp106_mclk_init;
gops->pmu.mclk_change = gp106_mclk_change;
gops->pmu.mclk_deinit = gp106_mclk_deinit;
gops->pmu.is_pmu_supported = gp106_is_pmu_supported; gops->pmu.is_pmu_supported = gp106_is_pmu_supported;
gops->pmu.reset_engine = gp106_pmu_engine_reset; gops->pmu.reset_engine = gp106_pmu_engine_reset;
gops->pmu.is_engine_in_reset = gp106_pmu_is_engine_in_reset; gops->pmu.is_engine_in_reset = gp106_pmu_is_engine_in_reset;

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@@ -3276,7 +3276,6 @@ int gp106_mclk_init(struct gk20a *g)
mclk->debugfs_set = true; mclk->debugfs_set = true;
} }
#endif #endif
g->ops.pmu.mclk_change = gp106_mclk_change;
mclk->init = true; mclk->init = true;
@@ -3437,8 +3436,8 @@ static int mclk_debug_speed_set(void *data, u64 val)
/* This is problematic because it can interrupt the arbiter /* This is problematic because it can interrupt the arbiter
* and send it to sleep. we need to consider removing this * and send it to sleep. we need to consider removing this
*/ */
if (g->ops.pmu.mclk_change) if (g->ops.clk.mclk_change)
return g->ops.pmu.mclk_change(g, (u16) val); return g->ops.clk.mclk_change(g, (u16) val);
return 0; return 0;
} }