From c1a1a140865dfab2368606614c823f6bd757b01a Mon Sep 17 00:00:00 2001 From: srajum Date: Mon, 2 Jan 2023 17:27:18 +0530 Subject: [PATCH] gpu: nvgpu: Fix CERT-C L1 defects - CID 588842 - CID 588848 Bug 3512545 Change-Id: Icc804715c086ce6abc1df37ed6be9ea578d01623 Signed-off-by: srajum Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2836068 Reviewed-by: Vivek Kumar (SW-TEGRA) Reviewed-by: Vaibhav Kachore GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c b/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c index 5459ae54d..c70599aa0 100644 --- a/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c +++ b/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -576,10 +576,14 @@ void nvgpu_nvs_buffer_free(struct nvgpu_nvs_domain_ctrl_fifo *sched_ctrl, if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_WRITE) { nvgpu_nvs_domain_ctrl_fifo_set_receiver(g, NULL); - nvs_control_fifo_receiver_exit(g, send_queue_receiver); + if (send_queue_receiver != NULL) { + nvs_control_fifo_receiver_exit(g, send_queue_receiver); + } } else if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_READ) { nvgpu_nvs_domain_ctrl_fifo_set_sender(g, NULL); - nvs_control_fifo_sender_exit(g, receiver_queue_sender); + if (receiver_queue_sender != NULL) { + nvs_control_fifo_sender_exit(g, receiver_queue_sender); + } } #endif