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Revert "Revert "gpu: nvgpu: array of pointers to runlists""

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This reverts commit ade1d50cbe.

Currently a fifo_runlist_info_gk20a structure is allocated and
initialized for each possible runlist. But only a few runlists
are actually used.

Use an array of pointers to runlists in fifo_gk20a. The array
keeps existing indexing by runlist_id. In this patch a context
is still allocated for each possible runlist, but follow up
patch will allow to skip context allocation for inactive
runlists.

Bug 2470115
Bug 2522374

Change-Id: I0deb6981bc6f5152bdf121f0a44429748aa14687
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2030407
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-02-28 19:51:36 -08:00
committed by mobile promotions
parent 8bbbd09caa
commit c23738969d
10 changed files with 59 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
userspace/units/fifo/runlist/nvgpu-runlist.c
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@@ -35,10 +35,11 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map,
unsigned long *ch_map, struct tsg_gk20a *tsgs,
struct channel_gk20a *chs, unsigned int num_tsgs,
unsigned int num_channels,
struct fifo_runlist_info_gk20a *runlist, u32 *rl_data,
struct fifo_runlist_info_gk20a **runlists, u32 *rl_data,
bool interleave)
{
struct fifo_gk20a *f = &g->fifo;
struct fifo_runlist_info_gk20a *runlist = runlists[0];
/* we only use the runlist 0 here */
runlist->mem[0].cpu_va = rl_data;
@@ -53,7 +54,7 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map,
f->tsg = tsgs;
f->channel = chs;
f->num_channels = num_channels;
f->runlist_info = runlist;
f->runlist_info = runlists;
/*
* For testing the runlist entry order format, these simpler dual-u32
@@ -117,7 +118,7 @@ static int run_format_test(struct unit_module *m, struct fifo_gk20a *f,
setup_tsg_multich(tsg, chs, 0, prio, 5, n_ch);
/* entry capacity: tsg header and some channels */
n = nvgpu_runlist_construct_locked(f, f->runlist_info, 0, 1 + n_ch);
n = nvgpu_runlist_construct_locked(f, f->runlist_info[0], 0, 1 + n_ch);
if (n != 1 + n_ch) {
unit_return_fail(m, "number of entries mismatch %d\n", n);
}
@@ -160,6 +161,7 @@ static int test_tsg_format_gen(struct unit_module *m, struct gk20a *g,
{
struct fifo_gk20a *f = &g->fifo;
struct fifo_runlist_info_gk20a runlist;
struct fifo_runlist_info_gk20a *runlists = &runlist;
unsigned long active_tsgs_map = 0;
unsigned long active_chs_map = 0;
struct tsg_gk20a tsgs[1] = {{0}};
@@ -172,7 +174,7 @@ static int test_tsg_format_gen(struct unit_module *m, struct gk20a *g,
(void)test_args->timeslice;
setup_fifo(g, &active_tsgs_map, &active_chs_map, tsgs, chs, 1, 5,
&runlist, rl_data, false);
&runlists, rl_data, false);
active_chs_map = test_args->chs_bitmap;
@@ -220,6 +222,7 @@ static int test_common_gen(struct unit_module *m, struct gk20a *g,
{
struct fifo_gk20a *f = &g->fifo;
struct fifo_runlist_info_gk20a runlist;
struct fifo_runlist_info_gk20a *runlists = &runlist;
unsigned long active_tsgs_map = 0;
unsigned long active_chs_map = 0;
struct tsg_gk20a tsgs[6] = {{0}};
@@ -233,7 +236,7 @@ static int test_common_gen(struct unit_module *m, struct gk20a *g,
u32 i = 0;
setup_fifo(g, &active_tsgs_map, &active_chs_map, tsgs, chs,
levels_count, 6, &runlist, rl_data, interleave);
levels_count, 6, &runlists, rl_data, interleave);
for (i = 0; i < levels_count; i++) {
setup_tsg(tsgs, chs, i, levels[i]);