diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c b/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c
index 8895beae5..4790e064a 100644
--- a/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c
+++ b/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c
@@ -81,7 +81,7 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c,
 		nvgpu_semaphore_prepare(s, c->hw_sema);
 	}
 
-	g->ops.sync.sema.add_sema_cmd(g, s, va, cmd, off, acquire, wfi);
+	g->ops.sync.sema.add_cmd(g, s, va, cmd, off, acquire, wfi);
 
 	if (acquire) {
 		gpu_sema_verbose_dbg(g, "(A) c=%d ACQ_GE %-4u pool=%-3llu"
@@ -154,7 +154,7 @@ static int channel_sync_semaphore_wait_fd(
 		goto cleanup;
 	}
 
-	wait_cmd_size = c->g->ops.sync.sema.get_sema_wait_cmd_size();
+	wait_cmd_size = c->g->ops.sync.sema.get_wait_cmd_size();
 	err = gk20a_channel_alloc_priv_cmdbuf(c,
 		wait_cmd_size * num_fences, entry);
 	if (err != 0) {
@@ -195,7 +195,7 @@ static int channel_sync_semaphore_incr_common(
 		return -ENOMEM;
 	}
 
-	incr_cmd_size = c->g->ops.sync.sema.get_sema_incr_cmd_size();
+	incr_cmd_size = c->g->ops.sync.sema.get_incr_cmd_size();
 	err = gk20a_channel_alloc_priv_cmdbuf(c, incr_cmd_size, incr_cmd);
 	if (err != 0) {
 		nvgpu_err(c->g,
diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c
index be92b4997..14fa16389 100644
--- a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c
+++ b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c
@@ -72,7 +72,7 @@ static int channel_sync_syncpt_gen_wait_cmd(struct channel_gk20a *c,
 	} else {
 		if (!preallocated) {
 			err = gk20a_channel_alloc_priv_cmdbuf(c,
-				c->g->ops.sync.syncpt.get_syncpt_wait_cmd_size(),
+				c->g->ops.sync.syncpt.get_wait_cmd_size(),
 				wait_cmd);
 			if (err != 0) {
 				nvgpu_err(c->g, "not enough priv cmd buffer space");
@@ -81,7 +81,7 @@ static int channel_sync_syncpt_gen_wait_cmd(struct channel_gk20a *c,
 		}
 		nvgpu_log(c->g, gpu_dbg_info, "sp->id %d gpu va %llx",
 				id, c->vm->syncpt_ro_map_gpu_va);
-		c->g->ops.sync.syncpt.add_syncpt_wait_cmd(c->g, wait_cmd,
+		c->g->ops.sync.syncpt.add_wait_cmd(c->g, wait_cmd,
 			pos * wait_cmd_size, id, thresh,
 			c->vm->syncpt_ro_map_gpu_va);
 	}
@@ -94,7 +94,7 @@ static int channel_sync_syncpt_wait_raw(struct nvgpu_channel_sync_syncpt *s,
 {
 	struct channel_gk20a *c = s->c;
 	int err = 0;
-	u32 wait_cmd_size = c->g->ops.sync.syncpt.get_syncpt_wait_cmd_size();
+	u32 wait_cmd_size = c->g->ops.sync.syncpt.get_wait_cmd_size();
 
 	if (!nvgpu_nvhost_syncpt_is_valid_pt_ext(s->nvhost_dev, id)) {
 		return -EINVAL;
@@ -150,7 +150,7 @@ static int channel_sync_syncpt_wait_fd(struct nvgpu_channel_sync *s, int fd,
 		}
 	}
 
-	wait_cmd_size = c->g->ops.sync.syncpt.get_syncpt_wait_cmd_size();
+	wait_cmd_size = c->g->ops.sync.syncpt.get_wait_cmd_size();
 	err = gk20a_channel_alloc_priv_cmdbuf(c,
 		wait_cmd_size * num_fences, wait_cmd);
 	if (err != 0) {
@@ -196,7 +196,7 @@ static int channel_sync_syncpt_incr_common(struct nvgpu_channel_sync *s,
 	struct nvgpu_os_fence os_fence = {0};
 
 	err = gk20a_channel_alloc_priv_cmdbuf(c,
-			c->g->ops.sync.syncpt.get_syncpt_incr_cmd_size(wfi_cmd),
+			c->g->ops.sync.syncpt.get_incr_cmd_size(wfi_cmd),
 			incr_cmd);
 	if (err != 0) {
 		return err;
@@ -204,11 +204,11 @@ static int channel_sync_syncpt_incr_common(struct nvgpu_channel_sync *s,
 
 	nvgpu_log(c->g, gpu_dbg_info, "sp->id %d gpu va %llx",
 				sp->id, sp->syncpt_buf.gpu_va);
-	c->g->ops.sync.syncpt.add_syncpt_incr_cmd(c->g, wfi_cmd,
+	c->g->ops.sync.syncpt.add_incr_cmd(c->g, wfi_cmd,
 			incr_cmd, sp->id, sp->syncpt_buf.gpu_va);
 
 	thresh = nvgpu_nvhost_syncpt_incr_max_ext(sp->nvhost_dev, sp->id,
-			c->g->ops.sync.syncpt.get_syncpt_incr_per_release());
+			c->g->ops.sync.syncpt.get_incr_per_release());
 
 	if (register_irq) {
 		struct channel_gk20a *referenced = gk20a_channel_get(c);
@@ -323,7 +323,7 @@ static void channel_sync_syncpt_destroy(struct nvgpu_channel_sync *s)
 		nvgpu_channel_sync_syncpt_from_ops(s);
 
 
-	sp->c->g->ops.sync.syncpt.free_syncpt_buf(sp->c, &sp->syncpt_buf);
+	sp->c->g->ops.sync.syncpt.free_buf(sp->c, &sp->syncpt_buf);
 
 	nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id);
 	nvgpu_nvhost_syncpt_put_ref_ext(sp->nvhost_dev, sp->id);
@@ -391,7 +391,7 @@ nvgpu_channel_sync_syncpt_create(struct channel_gk20a *c, bool user_managed)
 		return NULL;
 	}
 
-	sp->c->g->ops.sync.syncpt.alloc_syncpt_buf(sp->c, sp->id,
+	sp->c->g->ops.sync.syncpt.alloc_buf(sp->c, sp->id,
 				&sp->syncpt_buf);
 
 	nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id);
diff --git a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.c b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.c
index 31a05e360..7670bf119 100644
--- a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.c
+++ b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.c
@@ -29,17 +29,17 @@
 
 #include "sema_cmdbuf_gk20a.h"
 
-u32 gk20a_get_sema_wait_cmd_size(void)
+u32 gk20a_sema_get_wait_cmd_size(void)
 {
 	return 8U;
 }
 
-u32 gk20a_get_sema_incr_cmd_size(void)
+u32 gk20a_sema_get_incr_cmd_size(void)
 {
 	return 10U;
 }
 
-void gk20a_add_sema_cmd(struct gk20a *g, struct nvgpu_semaphore *s,
+void gk20a_sema_add_cmd(struct gk20a *g, struct nvgpu_semaphore *s,
 		u64 sema_va, struct priv_cmd_entry *cmd,
 		u32 off, bool acquire, bool wfi)
 {
diff --git a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.h b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.h
index 030e3b283..b9a4aa3f7 100644
--- a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.h
+++ b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gk20a.h
@@ -28,9 +28,9 @@ struct gk20a;
 struct priv_cmd_entry;
 struct nvgpu_semaphore;
 
-u32 gk20a_get_sema_wait_cmd_size(void);
-u32 gk20a_get_sema_incr_cmd_size(void);
-void gk20a_add_sema_cmd(struct gk20a *g, struct nvgpu_semaphore *s,
+u32 gk20a_sema_get_wait_cmd_size(void);
+u32 gk20a_sema_get_incr_cmd_size(void);
+void gk20a_sema_add_cmd(struct gk20a *g, struct nvgpu_semaphore *s,
 		u64 sema_va, struct priv_cmd_entry *cmd,
 		u32 off, bool acquire, bool wfi);
 
diff --git a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.c b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.c
index cbc422610..cd6393f62 100644
--- a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.c
+++ b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.c
@@ -29,17 +29,17 @@
 
 #include "sema_cmdbuf_gv11b.h"
 
-u32 gv11b_get_sema_wait_cmd_size(void)
+u32 gv11b_sema_get_wait_cmd_size(void)
 {
 	return 10U;
 }
 
-u32 gv11b_get_sema_incr_cmd_size(void)
+u32 gv11b_sema_get_incr_cmd_size(void)
 {
 	return 12U;
 }
 
-void gv11b_add_sema_cmd(struct gk20a *g,
+void gv11b_sema_add_cmd(struct gk20a *g,
 		struct nvgpu_semaphore *s, u64 sema_va,
 		struct priv_cmd_entry *cmd,
 		u32 off, bool acquire, bool wfi)
diff --git a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.h b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.h
index eb2bda02b..d38fcc4d6 100644
--- a/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.h
+++ b/drivers/gpu/nvgpu/common/sync/sema_cmdbuf_gv11b.h
@@ -28,9 +28,9 @@ struct gk20a;
 struct priv_cmd_entry;
 struct nvgpu_semaphore;
 
-u32 gv11b_get_sema_wait_cmd_size(void);
-u32 gv11b_get_sema_incr_cmd_size(void);
-void gv11b_add_sema_cmd(struct gk20a *g,
+u32 gv11b_sema_get_wait_cmd_size(void);
+u32 gv11b_sema_get_incr_cmd_size(void);
+void gv11b_sema_add_cmd(struct gk20a *g,
 		struct nvgpu_semaphore *s, u64 sema_va,
 		struct priv_cmd_entry *cmd,
 		u32 off, bool acquire, bool wfi);
diff --git a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.c b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.c
index 0dd72f97f..32accaba5 100644
--- a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.c
+++ b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.c
@@ -28,7 +28,7 @@
 
 #include "syncpt_cmdbuf_gk20a.h"
 
-void gk20a_add_syncpt_wait_cmd(struct gk20a *g,
+void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
 {
@@ -45,17 +45,17 @@ void gk20a_add_syncpt_wait_cmd(struct gk20a *g,
 	nvgpu_mem_wr32(g, cmd->mem, off++, (id << 8U) | 0x10U);
 }
 
-u32 gk20a_get_syncpt_wait_cmd_size(void)
+u32 gk20a_syncpt_get_wait_cmd_size(void)
 {
 	return 4U;
 }
 
-u32 gk20a_get_syncpt_incr_per_release(void)
+u32 gk20a_syncpt_get_incr_per_release(void)
 {
 	return 2U;
 }
 
-void gk20a_add_syncpt_incr_cmd(struct gk20a *g,
+void gk20a_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va)
 {
@@ -83,7 +83,7 @@ void gk20a_add_syncpt_incr_cmd(struct gk20a *g,
 
 }
 
-u32 gk20a_get_syncpt_incr_cmd_size(bool wfi_cmd)
+u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	if (wfi_cmd) {
 		return 8U;
@@ -92,13 +92,13 @@ u32 gk20a_get_syncpt_incr_cmd_size(bool wfi_cmd)
 	}
 }
 
-void gk20a_free_syncpt_buf(struct channel_gk20a *c,
+void gk20a_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf)
 {
 
 }
 
-int gk20a_alloc_syncpt_buf(struct channel_gk20a *c,
+int gk20a_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
 {
 	return 0;
diff --git a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.h b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.h
index d66101f87..bb0fab138 100644
--- a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.h
+++ b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gk20a.h
@@ -30,51 +30,51 @@ struct nvgpu_mem;
 
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 
-void gk20a_add_syncpt_wait_cmd(struct gk20a *g,
+void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va);
-u32 gk20a_get_syncpt_wait_cmd_size(void);
-u32 gk20a_get_syncpt_incr_per_release(void);
-void gk20a_add_syncpt_incr_cmd(struct gk20a *g,
+u32 gk20a_syncpt_get_wait_cmd_size(void);
+u32 gk20a_syncpt_get_incr_per_release(void);
+void gk20a_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va);
-u32 gk20a_get_syncpt_incr_cmd_size(bool wfi_cmd);
-void gk20a_free_syncpt_buf(struct channel_gk20a *c,
+u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd);
+void gk20a_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf);
 
-int gk20a_alloc_syncpt_buf(struct channel_gk20a *c,
+int gk20a_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf);
 
 #else
 
-static inline void gk20a_add_syncpt_wait_cmd(struct gk20a *g,
+static inline void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
 {
 }
-static inline u32 gk20a_get_syncpt_wait_cmd_size(void)
+static inline u32 gk20a_syncpt_get_wait_cmd_size(void)
 {
 	return 0U;
 }
-static inline u32 gk20a_get_syncpt_incr_per_release(void)
+static inline u32 gk20a_syncpt_get_incr_per_release(void)
 {
 	return 0U;
 }
-static inline void gk20a_add_syncpt_incr_cmd(struct gk20a *g,
+static inline void gk20a_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va)
 {
 }
-static inline u32 gk20a_get_syncpt_incr_cmd_size(bool wfi_cmd)
+static inline u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 0U;
 }
-static inline void gk20a_free_syncpt_buf(struct channel_gk20a *c,
+static inline void gk20a_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf)
 {
 }
 
-static inline int gk20a_alloc_syncpt_buf(struct channel_gk20a *c,
+static inline int gk20a_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
 {
 	return -ENOSYS;
diff --git a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.c b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.c
index 09bba48ed..6fba8bb4d 100644
--- a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.c
+++ b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.c
@@ -54,7 +54,7 @@ static int set_syncpt_ro_map_gpu_va_locked(struct vm_gk20a *vm)
 	return 0;
 }
 
-int gv11b_alloc_syncpt_buf(struct channel_gk20a *c,
+int gv11b_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
 {
 	u32 nr_pages;
@@ -90,14 +90,14 @@ int gv11b_alloc_syncpt_buf(struct channel_gk20a *c,
 	return err;
 }
 
-void gv11b_free_syncpt_buf(struct channel_gk20a *c,
+void gv11b_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf)
 {
 	nvgpu_gmmu_unmap(c->vm, syncpt_buf, syncpt_buf->gpu_va);
 	nvgpu_dma_free(c->g, syncpt_buf);
 }
 
-int gv11b_get_sync_ro_map(struct vm_gk20a *vm,
+int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
 		u64 *base_gpuva, u32 *sync_size)
 {
 	struct gk20a *g = gk20a_from_vm(vm);
@@ -116,7 +116,7 @@ int gv11b_get_sync_ro_map(struct vm_gk20a *vm,
 	return 0;
 }
 
-void gv11b_add_syncpt_wait_cmd(struct gk20a *g,
+void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va_base)
 {
@@ -148,17 +148,17 @@ void gv11b_add_syncpt_wait_cmd(struct gk20a *g,
 	nvgpu_mem_wr32(g, cmd->mem, off++, 0x2 | (1 << 12));
 }
 
-u32 gv11b_get_syncpt_wait_cmd_size(void)
+u32 gv11b_syncpt_get_wait_cmd_size(void)
 {
 	return 10U;
 }
 
-u32 gv11b_get_syncpt_incr_per_release(void)
+u32 gv11b_syncpt_get_incr_per_release(void)
 {
 	return 1U;
 }
 
-void gv11b_add_syncpt_incr_cmd(struct gk20a *g,
+void gv11b_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va)
 {
@@ -188,7 +188,7 @@ void gv11b_add_syncpt_incr_cmd(struct gk20a *g,
 		0x1 | ((wfi_cmd ? 0x1 : 0x0) << 20));
 }
 
-u32 gv11b_get_syncpt_incr_cmd_size(bool wfi_cmd)
+u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 10U;
 }
diff --git a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.h b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.h
index 4317daad3..0891eacc8 100644
--- a/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.h
+++ b/drivers/gpu/nvgpu/common/sync/syncpt_cmdbuf_gv11b.h
@@ -32,60 +32,60 @@ struct vm_gk20a;
 
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 
-void gv11b_add_syncpt_wait_cmd(struct gk20a *g,
+void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va);
-u32 gv11b_get_syncpt_wait_cmd_size(void);
-u32 gv11b_get_syncpt_incr_per_release(void);
-void gv11b_add_syncpt_incr_cmd(struct gk20a *g,
+u32 gv11b_syncpt_get_wait_cmd_size(void);
+u32 gv11b_syncpt_get_incr_per_release(void);
+void gv11b_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va);
-u32 gv11b_get_syncpt_incr_cmd_size(bool wfi_cmd);
-void gv11b_free_syncpt_buf(struct channel_gk20a *c,
+u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd);
+void gv11b_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf);
 
-int gv11b_alloc_syncpt_buf(struct channel_gk20a *c,
+int gv11b_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf);
 
-int gv11b_get_sync_ro_map(struct vm_gk20a *vm,
+int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
 		u64 *base_gpuva, u32 *sync_size);
 
 #else
 
-static inline void gv11b_add_syncpt_wait_cmd(struct gk20a *g,
+static inline void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
 {
 }
-static inline u32 gv11b_get_syncpt_wait_cmd_size(void)
+static inline u32 gv11b_syncpt_get_wait_cmd_size(void)
 {
 	return 0U;
 }
-static inline u32 gv11b_get_syncpt_incr_per_release(void)
+static inline u32 gv11b_syncpt_get_incr_per_release(void)
 {
 	return 0U;
 }
-static inline void gv11b_add_syncpt_incr_cmd(struct gk20a *g,
+static inline void gv11b_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va)
 {
 }
-static inline u32 gv11b_get_syncpt_incr_cmd_size(bool wfi_cmd)
+static inline u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 0U;
 }
-static inline void gv11b_free_syncpt_buf(struct channel_gk20a *c,
+static inline void gv11b_syncpt_free_buf(struct channel_gk20a *c,
 		struct nvgpu_mem *syncpt_buf)
 {
 }
 
-static inline int gv11b_alloc_syncpt_buf(struct channel_gk20a *c,
+static inline int gv11b_syncpt_alloc_buf(struct channel_gk20a *c,
 		u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
 {
 	return -EINVAL;
 }
 
-static inline int gv11b_get_sync_ro_map(struct vm_gk20a *vm,
+static inline int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
 		u64 *base_gpuva, u32 *sync_size)
 {
 	return -EINVAL;
diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c
index 85e80dda3..49243a346 100644
--- a/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c
@@ -74,7 +74,7 @@ static int set_syncpt_ro_map_gpu_va_locked(struct vm_gk20a *vm)
 	return 0;
 }
 
-int vgpu_gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c,
+int vgpu_gv11b_fifo_alloc_buf(struct channel_gk20a *c,
 				u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
 {
 	int err;
@@ -121,7 +121,7 @@ int vgpu_gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c,
 	return 0;
 }
 
-void vgpu_gv11b_fifo_free_syncpt_buf(struct channel_gk20a *c,
+void vgpu_gv11b_fifo_free_buf(struct channel_gk20a *c,
 					struct nvgpu_mem *syncpt_buf)
 {
 	nvgpu_gmmu_unmap(c->vm, syncpt_buf, syncpt_buf->gpu_va);
diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h
index 505255096..4f10aa148 100644
--- a/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h
@@ -26,9 +26,9 @@
 struct gk20a;
 
 int vgpu_gv11b_init_fifo_setup_hw(struct gk20a *g);
-int vgpu_gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c,
+int vgpu_gv11b_fifo_alloc_buf(struct channel_gk20a *c,
 			u32 syncpt_id, struct nvgpu_mem *syncpt_buf);
-void vgpu_gv11b_fifo_free_syncpt_buf(struct channel_gk20a *c,
+void vgpu_gv11b_fifo_free_buf(struct channel_gk20a *c,
 					struct nvgpu_mem *syncpt_buf);
 int vgpu_gv11b_fifo_get_sync_ro_map(struct vm_gk20a *vm,
 	u64 *base_gpuva, u32 *sync_size);
diff --git a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
index 93413beaa..4717b0e39 100644
--- a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -463,23 +463,23 @@ static const struct gpu_ops vgpu_gp10b_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gk20a_alloc_syncpt_buf,
-			.free_syncpt_buf = gk20a_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gk20a_add_syncpt_wait_cmd,
-			.get_syncpt_wait_cmd_size =
-					gk20a_get_syncpt_wait_cmd_size,
-			.get_syncpt_incr_per_release =
-					gk20a_get_syncpt_incr_per_release,
-			.add_syncpt_incr_cmd = gk20a_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gk20a_get_syncpt_incr_cmd_size,
+			.alloc_buf = gk20a_syncpt_alloc_buf,
+			.free_buf = gk20a_syncpt_free_buf,
+			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
+			.get_wait_cmd_size =
+					gk20a_syncpt_get_wait_cmd_size,
+			.get_incr_per_release =
+					gk20a_syncpt_get_incr_per_release,
+			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gk20a_syncpt_get_incr_cmd_size,
 			.get_sync_ro_map = NULL,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gk20a_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gk20a_get_sema_incr_cmd_size,
-			.add_sema_cmd = gk20a_add_sema_cmd,
+			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
+			.add_cmd = gk20a_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
index c6de8852f..fa1364bde 100644
--- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -550,23 +550,23 @@ static const struct gpu_ops vgpu_gv11b_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = vgpu_gv11b_fifo_alloc_syncpt_buf,
-			.free_syncpt_buf = vgpu_gv11b_fifo_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gv11b_add_syncpt_wait_cmd,
-			.get_syncpt_wait_cmd_size =
-					gv11b_get_syncpt_wait_cmd_size,
-			.get_syncpt_incr_per_release =
-					gv11b_get_syncpt_incr_per_release,
-			.add_syncpt_incr_cmd = gv11b_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gv11b_get_syncpt_incr_cmd_size,
+			.alloc_buf = vgpu_gv11b_fifo_alloc_buf,
+			.free_buf = vgpu_gv11b_fifo_free_buf,
+			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
+			.get_wait_cmd_size =
+					gv11b_syncpt_get_wait_cmd_size,
+			.get_incr_per_release =
+					gv11b_syncpt_get_incr_per_release,
+			.add_incr_cmd = gv11b_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gv11b_syncpt_get_incr_cmd_size,
 			.get_sync_ro_map = vgpu_gv11b_fifo_get_sync_ro_map,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gv11b_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gv11b_get_sema_incr_cmd_size,
-			.add_sema_cmd = gv11b_add_sema_cmd,
+			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
+			.add_cmd = gv11b_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 06c64666a..be9a39270 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -697,23 +697,23 @@ static const struct gpu_ops gm20b_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gk20a_alloc_syncpt_buf,
-			.free_syncpt_buf = gk20a_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gk20a_add_syncpt_wait_cmd,
-			.get_syncpt_incr_per_release =
-					gk20a_get_syncpt_incr_per_release,
-			.get_syncpt_wait_cmd_size =
-					gk20a_get_syncpt_wait_cmd_size,
-			.add_syncpt_incr_cmd = gk20a_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gk20a_get_syncpt_incr_cmd_size,
+			.alloc_buf = gk20a_syncpt_alloc_buf,
+			.free_buf = gk20a_syncpt_free_buf,
+			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
+			.get_incr_per_release =
+					gk20a_syncpt_get_incr_per_release,
+			.get_wait_cmd_size =
+					gk20a_syncpt_get_wait_cmd_size,
+			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gk20a_syncpt_get_incr_cmd_size,
 			.get_sync_ro_map = NULL,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gk20a_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gk20a_get_sema_incr_cmd_size,
-			.add_sema_cmd = gk20a_add_sema_cmd,
+			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
+			.add_cmd = gk20a_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 2890f96c7..a5000410a 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -794,23 +794,23 @@ static const struct gpu_ops gp10b_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gk20a_alloc_syncpt_buf,
-			.free_syncpt_buf = gk20a_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gk20a_add_syncpt_wait_cmd,
-			.get_syncpt_incr_per_release =
-					gk20a_get_syncpt_incr_per_release,
-			.get_syncpt_wait_cmd_size =
-					gk20a_get_syncpt_wait_cmd_size,
-			.add_syncpt_incr_cmd = gk20a_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gk20a_get_syncpt_incr_cmd_size,
+			.alloc_buf = gk20a_syncpt_alloc_buf,
+			.free_buf = gk20a_syncpt_free_buf,
+			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
+			.get_incr_per_release =
+					gk20a_syncpt_get_incr_per_release,
+			.get_wait_cmd_size =
+					gk20a_syncpt_get_wait_cmd_size,
+			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gk20a_syncpt_get_incr_cmd_size,
 			.get_sync_ro_map = NULL,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gk20a_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gk20a_get_sema_incr_cmd_size,
-			.add_sema_cmd = gk20a_add_sema_cmd,
+			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
+			.add_cmd = gk20a_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index d56dc0d74..f262f7d6f 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -967,23 +967,23 @@ static const struct gpu_ops gv100_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gv11b_alloc_syncpt_buf,
-			.free_syncpt_buf = gv11b_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gv11b_add_syncpt_wait_cmd,
-			.get_syncpt_wait_cmd_size =
-					gv11b_get_syncpt_wait_cmd_size,
-			.add_syncpt_incr_cmd = gv11b_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gv11b_get_syncpt_incr_cmd_size,
-			.get_syncpt_incr_per_release =
-					gv11b_get_syncpt_incr_per_release,
-			.get_sync_ro_map = gv11b_get_sync_ro_map,
+			.alloc_buf = gv11b_syncpt_alloc_buf,
+			.free_buf = gv11b_syncpt_free_buf,
+			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
+			.get_wait_cmd_size =
+					gv11b_syncpt_get_wait_cmd_size,
+			.add_incr_cmd = gv11b_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gv11b_syncpt_get_incr_cmd_size,
+			.get_incr_per_release =
+					gv11b_syncpt_get_incr_per_release,
+			.get_sync_ro_map = gv11b_syncpt_get_sync_ro_map,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gv11b_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gv11b_get_sema_incr_cmd_size,
-			.add_sema_cmd = gv11b_add_sema_cmd,
+			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
+			.add_cmd = gv11b_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 975ac1fea..b00e7b2ea 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -941,23 +941,23 @@ static const struct gpu_ops gv11b_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gv11b_alloc_syncpt_buf,
-			.free_syncpt_buf = gv11b_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gv11b_add_syncpt_wait_cmd,
-			.get_syncpt_wait_cmd_size =
-					gv11b_get_syncpt_wait_cmd_size,
-			.add_syncpt_incr_cmd = gv11b_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gv11b_get_syncpt_incr_cmd_size,
-			.get_syncpt_incr_per_release =
-					gv11b_get_syncpt_incr_per_release,
-			.get_sync_ro_map = gv11b_get_sync_ro_map,
+			.alloc_buf = gv11b_syncpt_alloc_buf,
+			.free_buf = gv11b_syncpt_free_buf,
+			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
+			.get_wait_cmd_size =
+					gv11b_syncpt_get_wait_cmd_size,
+			.add_incr_cmd = gv11b_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gv11b_syncpt_get_incr_cmd_size,
+			.get_incr_per_release =
+					gv11b_syncpt_get_incr_per_release,
+			.get_sync_ro_map = gv11b_syncpt_get_sync_ro_map,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gv11b_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gv11b_get_sema_incr_cmd_size,
-			.add_sema_cmd = gv11b_add_sema_cmd,
+			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
+			.add_cmd = gv11b_sema_add_cmd,
 		},
 	},
 	.engine_status = {
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 3c779b1ba..b564f46e7 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -1119,29 +1119,29 @@ struct gpu_ops {
 	struct {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		struct {
-			int (*alloc_syncpt_buf)(struct channel_gk20a *c,
+			int (*alloc_buf)(struct channel_gk20a *c,
 					u32 syncpt_id,
 					struct nvgpu_mem *syncpt_buf);
-			void (*free_syncpt_buf)(struct channel_gk20a *c,
+			void (*free_buf)(struct channel_gk20a *c,
 					struct nvgpu_mem *syncpt_buf);
-			void (*add_syncpt_wait_cmd)(struct gk20a *g,
+			void (*add_wait_cmd)(struct gk20a *g,
 					struct priv_cmd_entry *cmd, u32 off,
 					u32 id, u32 thresh, u64 gpu_va);
-			u32 (*get_syncpt_wait_cmd_size)(void);
-			void (*add_syncpt_incr_cmd)(struct gk20a *g,
+			u32 (*get_wait_cmd_size)(void);
+			void (*add_incr_cmd)(struct gk20a *g,
 					bool wfi_cmd,
 					struct priv_cmd_entry *cmd,
 					u32 id, u64 gpu_va);
-			u32 (*get_syncpt_incr_cmd_size)(bool wfi_cmd);
+			u32 (*get_incr_cmd_size)(bool wfi_cmd);
 			int (*get_sync_ro_map)(struct vm_gk20a *vm,
 					u64 *base_gpuva, u32 *sync_size);
-			u32 (*get_syncpt_incr_per_release)(void);
+			u32 (*get_incr_per_release)(void);
 		} syncpt;
 #endif
 		struct {
-			u32 (*get_sema_wait_cmd_size)(void);
-			u32 (*get_sema_incr_cmd_size)(void);
-			void (*add_sema_cmd)(struct gk20a *g,
+			u32 (*get_wait_cmd_size)(void);
+			u32 (*get_incr_cmd_size)(void);
+			void (*add_cmd)(struct gk20a *g,
 				struct nvgpu_semaphore *s, u64 sema_va,
 				struct priv_cmd_entry *cmd,
 				u32 off, bool acquire, bool wfi);
diff --git a/drivers/gpu/nvgpu/tu104/hal_tu104.c b/drivers/gpu/nvgpu/tu104/hal_tu104.c
index e106a3368..9c8204f92 100644
--- a/drivers/gpu/nvgpu/tu104/hal_tu104.c
+++ b/drivers/gpu/nvgpu/tu104/hal_tu104.c
@@ -1004,23 +1004,23 @@ static const struct gpu_ops tu104_ops = {
 	.sync = {
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.syncpt = {
-			.alloc_syncpt_buf = gv11b_alloc_syncpt_buf,
-			.free_syncpt_buf = gv11b_free_syncpt_buf,
-			.add_syncpt_wait_cmd = gv11b_add_syncpt_wait_cmd,
-			.get_syncpt_wait_cmd_size =
-					gv11b_get_syncpt_wait_cmd_size,
-			.add_syncpt_incr_cmd = gv11b_add_syncpt_incr_cmd,
-			.get_syncpt_incr_cmd_size =
-					gv11b_get_syncpt_incr_cmd_size,
-			.get_syncpt_incr_per_release =
-					gv11b_get_syncpt_incr_per_release,
-			.get_sync_ro_map = gv11b_get_sync_ro_map,
+			.alloc_buf = gv11b_syncpt_alloc_buf,
+			.free_buf = gv11b_syncpt_free_buf,
+			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
+			.get_wait_cmd_size =
+					gv11b_syncpt_get_wait_cmd_size,
+			.add_incr_cmd = gv11b_syncpt_add_incr_cmd,
+			.get_incr_cmd_size =
+					gv11b_syncpt_get_incr_cmd_size,
+			.get_incr_per_release =
+					gv11b_syncpt_get_incr_per_release,
+			.get_sync_ro_map = gv11b_syncpt_get_sync_ro_map,
 		},
 #endif
 		.sema = {
-			.get_sema_wait_cmd_size = gv11b_get_sema_wait_cmd_size,
-			.get_sema_incr_cmd_size = gv11b_get_sema_incr_cmd_size,
-			.add_sema_cmd = gv11b_add_sema_cmd,
+			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
+			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
+			.add_cmd = gv11b_sema_add_cmd,
 		},
 	},
 	.engine_status = {