From c2a1cc5ff8d34f4b910a53c015b01e70ddd47b78 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Wed, 6 Feb 2019 11:59:39 +0530 Subject: [PATCH] gpu: nvgpu: remove unneeded falcon struct members Remove unneeded members from falcon struct - flcn_core_rev, isr_enabled, isr_mutex, intr_mask & intr_dest. JIRA NVGPU-1459 Change-Id: I682666355778c1ac9ff0ffae014ff3271f9149a7 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2015587 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/falcon/falcon.c | 4 +--- drivers/gpu/nvgpu/common/falcon/falcon_gk20a.c | 7 ++++--- drivers/gpu/nvgpu/common/falcon/falcon_priv.h | 8 ++------ 3 files changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c index a4490f542..59a1f3daa 100644 --- a/drivers/gpu/nvgpu/common/falcon/falcon.c +++ b/drivers/gpu/nvgpu/common/falcon/falcon.c @@ -143,9 +143,7 @@ void nvgpu_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable, flcn_ops = &flcn->flcn_ops; if (flcn_ops->set_irq != NULL) { - flcn->intr_mask = intr_mask; - flcn->intr_dest = intr_dest; - flcn_ops->set_irq(flcn, enable); + flcn_ops->set_irq(flcn, enable, intr_mask, intr_dest); } else { nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ", flcn->flcn_id); diff --git a/drivers/gpu/nvgpu/common/falcon/falcon_gk20a.c b/drivers/gpu/nvgpu/common/falcon/falcon_gk20a.c index 5e79b489f..08d4829f5 100644 --- a/drivers/gpu/nvgpu/common/falcon/falcon_gk20a.c +++ b/drivers/gpu/nvgpu/common/falcon/falcon_gk20a.c @@ -70,7 +70,8 @@ static bool gk20a_falcon_clear_halt_interrupt_status(struct nvgpu_falcon *flcn) return status; } -static void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable) +static void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable, + u32 intr_mask, u32 intr_dest) { struct gk20a *g = flcn->g; u32 base_addr = flcn->flcn_base; @@ -84,9 +85,9 @@ static void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable) if (enable) { gk20a_writel(g, base_addr + falcon_falcon_irqmset_r(), - flcn->intr_mask); + intr_mask); gk20a_writel(g, base_addr + falcon_falcon_irqdest_r(), - flcn->intr_dest); + intr_dest); } else { gk20a_writel(g, base_addr + falcon_falcon_irqmclr_r(), 0xffffffffU); diff --git a/drivers/gpu/nvgpu/common/falcon/falcon_priv.h b/drivers/gpu/nvgpu/common/falcon/falcon_priv.h index 57e1a19fa..9a5e5c391 100644 --- a/drivers/gpu/nvgpu/common/falcon/falcon_priv.h +++ b/drivers/gpu/nvgpu/common/falcon/falcon_priv.h @@ -174,7 +174,8 @@ struct nvgpu_falcon_engine_dependency_ops { struct nvgpu_falcon_ops { int (*reset)(struct nvgpu_falcon *flcn); - void (*set_irq)(struct nvgpu_falcon *flcn, bool enable); + void (*set_irq)(struct nvgpu_falcon *flcn, bool enable, + u32 intr_mask, u32 intr_dest); bool (*clear_halt_interrupt_status)(struct nvgpu_falcon *flcn); bool (*is_falcon_cpu_halted)(struct nvgpu_falcon *flcn); bool (*is_falcon_idle)(struct nvgpu_falcon *flcn); @@ -204,13 +205,8 @@ struct nvgpu_falcon { struct gk20a *g; u32 flcn_id; u32 flcn_base; - u32 flcn_core_rev; bool is_falcon_supported; bool is_interrupt_enabled; - u32 intr_mask; - u32 intr_dest; - bool isr_enabled; - struct nvgpu_mutex isr_mutex; struct nvgpu_mutex copy_lock; struct nvgpu_falcon_ops flcn_ops; struct nvgpu_falcon_engine_dependency_ops flcn_engine_dep_ops;