From c32c86342e90cf7d85114f3a40853bc9ba0e7540 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Tue, 6 Jun 2017 18:58:17 -0700 Subject: [PATCH] gpu: nvgpu: g106 hal for mclk switching move mclk switching to gp106 hal. Bug 1921082 JIRA EVLR-1269 Change-Id: I97812b871384460bec88fddac0f6a326df12fc45 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1499393 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile.nvgpu | 2 +- drivers/gpu/nvgpu/clk/clk_mclk.h | 7 ------ drivers/gpu/nvgpu/common/linux/pci.c | 1 + drivers/gpu/nvgpu/gp106/pmu_gp106.c | 5 ++-- .../clk_mclk.c => gp106/pmu_mclk_gp106.c} | 9 +++---- drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h | 24 +++++++++++++++++++ 6 files changed, 34 insertions(+), 14 deletions(-) rename drivers/gpu/nvgpu/{clk/clk_mclk.c => gp106/pmu_mclk_gp106.c} (99%) create mode 100644 drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index 250acc151..6dbba4d94 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -192,6 +192,7 @@ nvgpu-y += \ gp106/hal_gp106.o \ gp106/mm_gp106.o \ gp106/pmu_gp106.o \ + gp106/pmu_mclk_gp106.o \ gp106/gr_gp106.o \ gp106/gr_ctx_gp106.o \ gp106/acr_gp106.o \ @@ -200,7 +201,6 @@ nvgpu-y += \ gp106/ltc_gp106.o \ gp106/fb_gp106.o \ gp106/regops_gp106.o \ - clk/clk_mclk.o \ pstate/pstate.o \ clk/clk_vin.o \ clk/clk_fll.o \ diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.h b/drivers/gpu/nvgpu/clk/clk_mclk.h index 4918b9179..b235deeab 100644 --- a/drivers/gpu/nvgpu/clk/clk_mclk.h +++ b/drivers/gpu/nvgpu/clk/clk_mclk.h @@ -21,9 +21,6 @@ #define GP106_MCLK_HIGH_SPEED 2 #define GP106_MCLK_NUM_SPEED 3 -#define GP106_MEM_CONFIG_GDDR5_PG418 0 -#define GP106_MEM_CONFIG_GDDR5_PG419 1 - enum gk20a_mclk_speed { gk20a_mclk_low_speed, gk20a_mclk_mid_speed, @@ -51,8 +48,4 @@ struct clk_mclk_state { #endif }; -int clk_mclkseq_init_mclk_gddr5(struct gk20a *g); -void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g); -int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val); - #endif diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c index 31181808f..c0510b72d 100644 --- a/drivers/gpu/nvgpu/common/linux/pci.c +++ b/drivers/gpu/nvgpu/common/linux/pci.c @@ -28,6 +28,7 @@ #include "clk/clk_mclk.h" #include "module.h" #include "intr.h" +#include "gp106/pmu_mclk_gp106.h" #include "pci.h" diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index 9c32d7a36..2ecd2ef11 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c @@ -19,6 +19,7 @@ #include "gm20b/pmu_gm20b.h" #include "gp10b/pmu_gp10b.h" #include "gp106/pmu_gp106.h" +#include "gp106/pmu_mclk_gp106.h" #include "gp106/acr_gp106.h" #include "clk/clk_mclk.h" @@ -443,8 +444,8 @@ void gp106_init_pmu_ops(struct gpu_ops *gops) gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; gops->pmu.dump_secure_fuses = NULL; gops->pmu.reset = gp106_falcon_reset; - gops->pmu.mclk_init = clk_mclkseq_init_mclk_gddr5; - gops->pmu.mclk_deinit = clk_mclkseq_deinit_mclk_gddr5; + gops->pmu.mclk_init = gp106_mclk_init; + gops->pmu.mclk_deinit = gp106_mclk_deinit; gops->pmu.is_pmu_supported = gp106_is_pmu_supported; gk20a_dbg_fn("done"); diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.c b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c similarity index 99% rename from drivers/gpu/nvgpu/clk/clk_mclk.c rename to drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c index b948dcb23..c510a8d76 100644 --- a/drivers/gpu/nvgpu/clk/clk_mclk.c +++ b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c @@ -20,6 +20,7 @@ #ifdef CONFIG_DEBUG_FS #include "gk20a/platform_gk20a.h" #endif +#include "gp106/pmu_mclk_gp106.h" #include #include @@ -2689,7 +2690,7 @@ done: return status; } -void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g) +void gp106_mclk_deinit(struct gk20a *g) { struct clk_mclk_state *mclk = &g->clk_pmu.clk_mclk; @@ -2697,7 +2698,7 @@ void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g) nvgpu_mutex_destroy(&mclk->mclk_lock); } -int clk_mclkseq_init_mclk_gddr5(struct gk20a *g) +int gp106_mclk_init(struct gk20a *g) { struct clk_mclk_state *mclk; int status; @@ -2768,7 +2769,7 @@ int clk_mclkseq_init_mclk_gddr5(struct gk20a *g) mclk->debugfs_set = true; } #endif - g->ops.pmu.mclk_change = clk_mclkseq_change_mclk_gddr5; + g->ops.pmu.mclk_change = gp106_mclk_change; mclk->init = true; @@ -2781,7 +2782,7 @@ fail_mclk_mutex: return err; } -int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val) +int gp106_mclk_change(struct gk20a *g, u16 val) { struct clk_mclk_state *mclk; struct pmu_payload payload; diff --git a/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h new file mode 100644 index 000000000..bfe4da5a4 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h @@ -0,0 +1,24 @@ +/* +* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +*/ + +#ifndef _PMU_MCLK_GP106_H_ +#define _PMU_MCLK_GP106_H_ + +#define GP106_MEM_CONFIG_GDDR5_PG418 0 +#define GP106_MEM_CONFIG_GDDR5_PG419 1 + +extern int gp106_mclk_init(struct gk20a *g); +extern void gp106_mclk_deinit(struct gk20a *g); +extern int gp106_mclk_change(struct gk20a *g, u16 val); + +#endif