gpu: nvgpu: print riscv pmu pc trace

- To print pmu RISCV PC trace, create a new flag
  which will be set to true after PMU is initialised.
- This flag is then used to used to print RISCV trace
  buffer when pmu halt occurrs.

JIRA NVGPU-7261

Change-Id: Ib3ad2f40efd1458d22b21e99ab151c11cfeb43be
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2624073
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/falcon/falcon_debug.c

@@ -69,6 +69,9 @@ int nvgpu_falcon_dbg_buf_init(struct nvgpu_falcon *flcn,
 	debug_buffer->first_msg_received = false;
 	debug_buffer->read_offset = 0;
 
+	/* upon initialisation set the flag to false for all falcon */
+	nvgpu_falcon_dbg_error_print_enable(flcn, false);
+
 	if (debug_buffer->local_buf == NULL) {
 		/*
 		 * Allocate memory for nvgpu-side debug buffer, used for copies
@@ -359,7 +362,17 @@ int nvgpu_falcon_dbg_buf_display(struct nvgpu_falcon *flcn)
 				return status;
 			}
 
-			nvgpu_falcon_dbg(g, "Flcn-%d Async: %s", flcn->flcn_id, curr_data);
+			/*
+			 * if the flag is set to true print the riscv
+			 * buffer as error
+			 */
+			if (debug_buffer->is_prints_as_err == true) {
+				nvgpu_err(g, "Flcn-%d Async: %s", flcn->flcn_id,
+								curr_data);
+			} else {
+				nvgpu_falcon_dbg(g, "Flcn-%d Async: %s",
+							flcn->flcn_id, curr_data);
+			}
 
 			/* Cleanup in case we had to allocate a temp buffer */
 			if (tmp_buf != NULL) {
@@ -376,3 +389,10 @@ int nvgpu_falcon_dbg_buf_display(struct nvgpu_falcon *flcn)
 
 	return 0;
 }
+
+void nvgpu_falcon_dbg_error_print_enable(struct nvgpu_falcon *flcn, bool enable)
+{
+	struct nvgpu_falcon_dbg_buf *debug_buffer = &flcn->debug_buffer;
+
+	debug_buffer->is_prints_as_err = enable;
+}

drivers/gpu/nvgpu/common/pmu/ipc/pmu_msg.c

@@ -485,6 +485,16 @@ static int pmu_process_init_msg(struct nvgpu_pmu *pmu,
 	nvgpu_pmu_set_fw_ready(g, pmu, true);
 
 	nvgpu_pmu_fw_state_change(g, pmu, PMU_FW_STATE_INIT_RECEIVED, true);
+
+#ifdef CONFIG_NVGPU_FALCON_DEBUG
+	/*
+	 * set the flag true after PMU is initialised.
+	 * This will be used to print debug buffer data
+	 * when any error on PMU occurs
+	 */
+	nvgpu_falcon_dbg_error_print_enable(pmu->flcn, true);
+#endif
+
 exit:
 	nvgpu_pmu_dbg(g, "init received end, err %x", err);
 	return err;

drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c

@@ -127,8 +127,9 @@ int nvgpu_pmu_destroy(struct gk20a *g, struct nvgpu_pmu *pmu)
 	nvgpu_pmu_set_fw_ready(g, pmu, false);
 	nvgpu_pmu_lsfm_clean(g, pmu, pmu->lsfm);
 	pmu->pmu_perfmon->perfmon_ready = false;
-
-
+#ifdef CONFIG_NVGPU_FALCON_DEBUG
+	nvgpu_falcon_dbg_error_print_enable(pmu->flcn, false);
+#endif
 	nvgpu_log_fn(g, "done");
 	return 0;
 }

drivers/gpu/nvgpu/include/nvgpu/falcon.h

@@ -233,6 +233,9 @@ struct nvgpu_falcon_dbg_buf {
 
 	/* Set once nvgpu get the first message from FLCN */
 	bool first_msg_received;
+
+	/* flag to print buffer when PMU error occurs */
+	bool is_prints_as_err;
 };
 #endif
 
@@ -798,6 +801,21 @@ void nvgpu_falcon_dbg_buf_destroy(struct nvgpu_falcon *flcn);
  * @return '0' if contents logged successfully, error otherwise.
  */
 int nvgpu_falcon_dbg_buf_display(struct nvgpu_falcon *flcn);
+
+/**
+ * @brief Enable/Disable falcon error print support
+ *
+ * @param flcn [in] The falcon.
+ * @param enable [in] true/false value to enable/disable error print
+ * support.
+ *
+ * This function sets the flag with true/false which respectively
+ * enables or disables the falcon error print support. This is used to
+ * print pc trace values when error is hit.
+ *
+ */
+void nvgpu_falcon_dbg_error_print_enable(struct nvgpu_falcon *flcn, bool enable);
+
 #endif
 
 /**