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gpu: nvgpu: Initialize ctxsw header counters

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Initialize following counters in context header
for all legacy chips:
ctxsw_prog_main_image_num_save_ops
ctxsw_prog_main_image_num_restore_ops

This was already present in the code but move to a function
gk20a_gr_init_ctxsw_hdr_data, so that it can be re-used across
chips.

Additionally initialize following preemption related counters
for gp10b onwards in context header:
ctxsw_prog_main_image_num_wfi_save_ops
ctxsw_prog_main_image_num_cta_save_ops
ctxsw_prog_main_image_num_gfxp_save_ops
ctxsw_prog_main_image_num_cilp_save_ops

Bug 1958308

Change-Id: I0e45ec718a8f9ddb951b52c92137051b4f6a8c60
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1562654
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
seshendra Gadagottu
2017-09-18 11:06:09 -07:00
committed by mobile promotions
parent c03ccd89c2
commit c4370d7def
7 changed files with 34 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
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@@ -1821,6 +1821,15 @@ cleanup_pm_buf:
return ret;
}
void gk20a_gr_init_ctxsw_hdr_data(struct gk20a *g,
struct nvgpu_mem *mem)
{
nvgpu_mem_wr(g, mem,
ctxsw_prog_main_image_num_save_ops_o(), 0);
nvgpu_mem_wr(g, mem,
ctxsw_prog_main_image_num_restore_ops_o(), 0);
}
/* load saved fresh copy of gloden image into channel gr_ctx */
int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
struct channel_gk20a *c)
@@ -1860,12 +1869,11 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
nvgpu_mem_wr_n(g, mem, 0,
gr->ctx_vars.local_golden_image,
gr->ctx_vars.golden_image_size);
nvgpu_mem_wr(g, mem,
ctxsw_prog_main_image_num_save_ops_o(), 0);
nvgpu_mem_wr(g, mem,
ctxsw_prog_main_image_num_restore_ops_o(), 0);
}
if (g->ops.gr.init_ctxsw_hdr_data)
g->ops.gr.init_ctxsw_hdr_data(g, mem);
if (g->ops.gr.enable_cde_in_fecs && c->cde)
g->ops.gr.enable_cde_in_fecs(g, mem);