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gpu: nvgpu: add CSS hal to get max buffer size
Currently max_css_buffer_size is incorrectly stored in struct nvgpu_gr Add a new hal g->ops.css.get_max_buffer_size() to get the size and remove the variable from struct nvgpu_gr Jira NVGPU-3125 Change-Id: If78fd86559526b84031051e281a98327a46fc11d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2105652 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -81,7 +81,6 @@ struct nvgpu_gr {
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u32 fbp_en_mask;
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u32 *fbp_rop_l2_en_mask;
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u32 max_css_buffer_size;
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u32 max_ctxsw_ring_buffer_size;
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struct nvgpu_mutex ctxsw_disable_mutex;
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@@ -599,3 +599,8 @@ int nvgpu_css_check_data_available(struct channel_gk20a *ch, u32 *pending,
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*hw_overflow = nvgpu_css_get_overflow_status(g);
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return 0;
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}
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u32 nvgpu_css_get_max_buffer_size(struct gk20a *g)
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{
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return 0xffffffffU;
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}
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@@ -728,6 +728,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
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.set_handled_snapshots = NULL,
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.allocate_perfmon_ids = NULL,
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.release_perfmon_ids = NULL,
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.get_max_buffer_size = vgpu_css_get_buffer_size,
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},
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#endif
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.priv_ring = {
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@@ -1231,14 +1231,15 @@ void vgpu_gr_init_cyclestats(struct gk20a *g)
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{
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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bool snapshots_supported = true;
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u32 max_css_buffer_size;
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/* cyclestats not supported on vgpu */
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nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS, false);
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g->gr->max_css_buffer_size = vgpu_css_get_buffer_size(g);
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max_css_buffer_size = vgpu_css_get_buffer_size(g);
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/* snapshots not supported if the buffer size is 0 */
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if (g->gr->max_css_buffer_size == 0) {
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if (max_css_buffer_size == 0) {
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snapshots_supported = false;
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}
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@@ -825,6 +825,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
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.set_handled_snapshots = NULL,
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.allocate_perfmon_ids = NULL,
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.release_perfmon_ids = NULL,
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.get_max_buffer_size = vgpu_css_get_buffer_size,
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},
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#endif
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.priv_ring = {
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@@ -492,7 +492,6 @@ void gr_gm20b_init_cyclestats(struct gk20a *g)
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT, true);
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g->gr->max_css_buffer_size = 0xffffffffU;
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#else
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(void)g;
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#endif
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@@ -1029,6 +1029,7 @@ static const struct gpu_ops gm20b_ops = {
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.release_perfmon_ids = nvgpu_css_release_perfmon_ids,
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.get_overflow_status = nvgpu_css_get_overflow_status,
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.get_pending_snapshots = nvgpu_css_get_pending_snapshots,
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.get_max_buffer_size = nvgpu_css_get_max_buffer_size,
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},
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#endif
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.falcon = {
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@@ -1109,6 +1109,7 @@ static const struct gpu_ops gp10b_ops = {
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.release_perfmon_ids = nvgpu_css_release_perfmon_ids,
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.get_overflow_status = nvgpu_css_get_overflow_status,
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.get_pending_snapshots = nvgpu_css_get_pending_snapshots,
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.get_max_buffer_size = nvgpu_css_get_max_buffer_size,
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},
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#endif
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.falcon = {
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@@ -1312,6 +1312,7 @@ static const struct gpu_ops gv100_ops = {
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.release_perfmon_ids = nvgpu_css_release_perfmon_ids,
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.get_overflow_status = nvgpu_css_get_overflow_status,
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.get_pending_snapshots = nvgpu_css_get_pending_snapshots,
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.get_max_buffer_size = nvgpu_css_get_max_buffer_size,
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},
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#endif
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.xve = {
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@@ -1299,6 +1299,7 @@ static const struct gpu_ops gv11b_ops = {
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.release_perfmon_ids = nvgpu_css_release_perfmon_ids,
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.get_overflow_status = nvgpu_css_get_overflow_status,
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.get_pending_snapshots = nvgpu_css_get_pending_snapshots,
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.get_max_buffer_size = nvgpu_css_get_max_buffer_size,
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},
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#endif
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.falcon = {
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@@ -1357,6 +1357,7 @@ static const struct gpu_ops tu104_ops = {
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.release_perfmon_ids = nvgpu_css_release_perfmon_ids,
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.get_overflow_status = nvgpu_css_get_overflow_status,
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.get_pending_snapshots = nvgpu_css_get_pending_snapshots,
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.get_max_buffer_size = nvgpu_css_get_max_buffer_size,
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},
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#endif
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.xve = {
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@@ -162,4 +162,6 @@ int nvgpu_css_flush(struct channel_gk20a *ch,
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void nvgpu_free_cyclestats_snapshot_data(struct gk20a *g);
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u32 nvgpu_css_get_max_buffer_size(struct gk20a *g);
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#endif /* CYCLESTATS_SNAPSHOT_H */
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@@ -1646,6 +1646,7 @@ struct gpu_ops {
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struct gk20a_cs_snapshot_client *client);
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bool (*get_overflow_status)(struct gk20a *g);
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u32 (*get_pending_snapshots)(struct gk20a *g);
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u32 (*get_max_buffer_size)(struct gk20a *g);
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} css;
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#endif
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struct {
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@@ -336,7 +336,7 @@ gk20a_ctrl_ioctl_gpu_characteristics(
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gpu.sm_arch_spa_version = g->params.sm_arch_spa_version;
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gpu.sm_arch_warp_count = g->params.sm_arch_warp_count;
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gpu.max_css_buffer_size = g->gr->max_css_buffer_size;
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gpu.max_css_buffer_size = g->ops.css.get_max_buffer_size(g);;
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gpu.max_ctxsw_ring_buffer_size = g->gr->max_ctxsw_ring_buffer_size;
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gpu.gpu_ioctl_nr_last = NVGPU_GPU_IOCTL_LAST;
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