diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 1f55bb16c..b1c56e6d9 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -219,6 +219,7 @@ nvgpu-y += \ common/mm/vm.o \ common/mm/vm_area.o \ common/mm/nvgpu_mem.o \ + common/mm/nvgpu_sgt.o \ common/mm/comptags.o \ common/mm/mm.o \ common/mm/dma.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index cf26d8025..9c08350ce 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -56,6 +56,7 @@ srcs := os/posix/nvgpu.c \ common/mm/vm.c \ common/mm/vm_area.c \ common/mm/nvgpu_mem.c \ + common/mm/nvgpu_sgt.c \ common/mm/comptags.c \ common/mm/mm.c \ common/mm/dma.c \ diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c index ab5299fb8..27febff7b 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "bus_gk20a.h" diff --git a/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c b/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c index f750d4e7c..796169abb 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c index 0a1e91998..2a5276221 100644 --- a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c @@ -89,62 +89,6 @@ bool nvgpu_mem_is_sysmem(struct nvgpu_mem *mem) return nvgpu_aperture_is_sysmem(mem->aperture); } -struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl) -{ - return sgt->ops->sgl_next(sgl); -} - -u64 nvgpu_sgt_get_phys(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl) -{ - return sgt->ops->sgl_phys(g, sgl); -} - -u64 nvgpu_sgt_get_ipa(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl) -{ - return sgt->ops->sgl_ipa(g, sgl); -} - -u64 nvgpu_sgt_ipa_to_pa(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len) -{ - return sgt->ops->sgl_ipa_to_pa(g, sgl, ipa, pa_len); -} - -u64 nvgpu_sgt_get_dma(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl) -{ - return sgt->ops->sgl_dma(sgl); -} - -u64 nvgpu_sgt_get_length(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl) -{ - return sgt->ops->sgl_length(sgl); -} - -u64 nvgpu_sgt_get_gpu_addr(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl, - struct nvgpu_gmmu_attrs *attrs) -{ - return sgt->ops->sgl_gpu_addr(g, sgl, attrs); -} - -bool nvgpu_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt) -{ - if (sgt->ops->sgt_iommuable != NULL) { - return sgt->ops->sgt_iommuable(g, sgt); - } - return false; -} - -void nvgpu_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt) -{ - if (sgt != NULL && sgt->ops->sgt_free != NULL) { - sgt->ops->sgt_free(g, sgt); - } -} - u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys) { /* ensure it is not vidmem allocation */ @@ -157,49 +101,6 @@ u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys) return phys; } -/* - * Determine alignment for a passed buffer. Necessary since the buffer may - * appear big enough to map with large pages but the SGL may have chunks that - * are not aligned on a 64/128kB large page boundary. There's also the - * possibility chunks are odd sizes which will necessitate small page mappings - * to correctly glue them together into a contiguous virtual mapping. - */ -u64 nvgpu_sgt_alignment(struct gk20a *g, struct nvgpu_sgt *sgt) -{ - u64 align = 0, chunk_align = 0; - struct nvgpu_sgl *sgl; - - /* - * If this SGT is iommuable and we want to use the IOMMU address then - * the SGT's first entry has the IOMMU address. We will align on this - * and double check length of buffer later. Also, since there's an - * IOMMU we know that this DMA address is contiguous. - */ - if (nvgpu_iommuable(g) && - nvgpu_sgt_iommuable(g, sgt) && - nvgpu_sgt_get_dma(sgt, sgt->sgl) != 0ULL) { - return 1ULL << __ffs(nvgpu_sgt_get_dma(sgt, sgt->sgl)); - } - - /* - * Otherwise the buffer is not iommuable (VIDMEM, for example) or we are - * bypassing the IOMMU and need to use the underlying physical entries - * of the SGT. - */ - nvgpu_sgt_for_each_sgl(sgl, sgt) { - chunk_align = 1ULL << __ffs(nvgpu_sgt_get_phys(g, sgt, sgl) | - nvgpu_sgt_get_length(sgt, sgl)); - - if (align != 0ULL) { - align = min(align, chunk_align); - } else { - align = chunk_align; - } - } - - return align; -} - u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w) { u32 data = 0; diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_sgt.c b/drivers/gpu/nvgpu/common/mm/nvgpu_sgt.c new file mode 100644 index 000000000..39d99d433 --- /dev/null +++ b/drivers/gpu/nvgpu/common/mm/nvgpu_sgt.c @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include + +struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl) +{ + return sgt->ops->sgl_next(sgl); +} + +u64 nvgpu_sgt_get_phys(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl) +{ + return sgt->ops->sgl_phys(g, sgl); +} + +u64 nvgpu_sgt_get_ipa(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl) +{ + return sgt->ops->sgl_ipa(g, sgl); +} + +u64 nvgpu_sgt_ipa_to_pa(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len) +{ + return sgt->ops->sgl_ipa_to_pa(g, sgl, ipa, pa_len); +} + +u64 nvgpu_sgt_get_dma(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl) +{ + return sgt->ops->sgl_dma(sgl); +} + +u64 nvgpu_sgt_get_length(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl) +{ + return sgt->ops->sgl_length(sgl); +} + +u64 nvgpu_sgt_get_gpu_addr(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl, + struct nvgpu_gmmu_attrs *attrs) +{ + return sgt->ops->sgl_gpu_addr(g, sgl, attrs); +} + +bool nvgpu_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt) +{ + if (sgt->ops->sgt_iommuable != NULL) { + return sgt->ops->sgt_iommuable(g, sgt); + } + return false; +} + +void nvgpu_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt) +{ + if (sgt != NULL && sgt->ops->sgt_free != NULL) { + sgt->ops->sgt_free(g, sgt); + } +} + +/* + * Determine alignment for a passed buffer. Necessary since the buffer may + * appear big enough to map with large pages but the SGL may have chunks that + * are not aligned on a 64/128kB large page boundary. There's also the + * possibility chunks are odd sizes which will necessitate small page mappings + * to correctly glue them together into a contiguous virtual mapping. + */ +u64 nvgpu_sgt_alignment(struct gk20a *g, struct nvgpu_sgt *sgt) +{ + u64 align = 0, chunk_align = 0; + struct nvgpu_sgl *sgl; + + /* + * If this SGT is iommuable and we want to use the IOMMU address then + * the SGT's first entry has the IOMMU address. We will align on this + * and double check length of buffer later. Also, since there's an + * IOMMU we know that this DMA address is contiguous. + */ + if (nvgpu_iommuable(g) && + nvgpu_sgt_iommuable(g, sgt) && + nvgpu_sgt_get_dma(sgt, sgt->sgl) != 0ULL) { + return 1ULL << __ffs(nvgpu_sgt_get_dma(sgt, sgt->sgl)); + } + + /* + * Otherwise the buffer is not iommuable (VIDMEM, for example) or we are + * bypassing the IOMMU and need to use the underlying physical entries + * of the SGT. + */ + nvgpu_sgt_for_each_sgl(sgl, sgt) { + chunk_align = 1ULL << __ffs(nvgpu_sgt_get_phys(g, sgt, sgl) | + nvgpu_sgt_get_length(sgt, sgl)); + + if (align != 0ULL) { + align = min(align, chunk_align); + } else { + align = chunk_align; + } + } + + return align; +} + +struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g, + struct nvgpu_mem *mem) +{ + return nvgpu_sgt_os_create_from_mem(g, mem); +} diff --git a/drivers/gpu/nvgpu/common/mm/vidmem.c b/drivers/gpu/nvgpu/common/mm/vidmem.c index a513fd1ed..79d8d6a9f 100644 --- a/drivers/gpu/nvgpu/common/mm/vidmem.c +++ b/drivers/gpu/nvgpu/common/mm/vidmem.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "gk20a/mm_gk20a.h" #include "gk20a/fence_gk20a.h" diff --git a/drivers/gpu/nvgpu/common/mm/vm.c b/drivers/gpu/nvgpu/common/mm/vm.c index f065cbf04..723ecedd7 100644 --- a/drivers/gpu/nvgpu/common/mm/vm.c +++ b/drivers/gpu/nvgpu/common/mm/vm.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include "gk20a/mm_gk20a.h" diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 7d4a9e2d9..f16ccaf13 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -58,6 +58,8 @@ struct set_fll_clk; struct boardobjgrp; struct boardobjgrp_pmu_cmd; struct boardobjgrpmask; +struct nvgpu_sgt; +struct nvgpu_sgl; #include #include diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h index 135ec719a..95ead8fe6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h @@ -37,7 +37,6 @@ struct page; struct sg_table; -struct nvgpu_sgt; struct gk20a; struct nvgpu_allocator; @@ -61,81 +60,6 @@ enum nvgpu_aperture { APERTURE_VIDMEM }; -/* - * Forward declared opaque placeholder type that does not really exist, but - * helps the compiler help us about getting types right. In reality, - * implementors of nvgpu_sgt_ops will have some concrete type in place of this. - */ -struct nvgpu_sgl; - -struct nvgpu_sgt_ops { - struct nvgpu_sgl *(*sgl_next)(struct nvgpu_sgl *sgl); - u64 (*sgl_phys)(struct gk20a *g, struct nvgpu_sgl *sgl); - u64 (*sgl_ipa)(struct gk20a *g, struct nvgpu_sgl *sgl); - u64 (*sgl_ipa_to_pa)(struct gk20a *g, struct nvgpu_sgl *sgl, - u64 ipa, u64 *pa_len); - u64 (*sgl_dma)(struct nvgpu_sgl *sgl); - u64 (*sgl_length)(struct nvgpu_sgl *sgl); - u64 (*sgl_gpu_addr)(struct gk20a *g, struct nvgpu_sgl *sgl, - struct nvgpu_gmmu_attrs *attrs); - /* - * If left NULL then iommuable is assumed to be false. - */ - bool (*sgt_iommuable)(struct gk20a *g, struct nvgpu_sgt *sgt); - - /* - * Note: this operates on the whole SGT not a specific SGL entry. - */ - void (*sgt_free)(struct gk20a *g, struct nvgpu_sgt *sgt); -}; - -/* - * Scatter gather table: this is a list of scatter list entries and the ops for - * interacting with those entries. - */ -struct nvgpu_sgt { - /* - * Ops for interacting with the underlying scatter gather list entries. - */ - const struct nvgpu_sgt_ops *ops; - - /* - * The first node in the scatter gather list. - */ - struct nvgpu_sgl *sgl; -}; - -/* - * This struct holds the necessary information for describing a struct - * nvgpu_mem's scatter gather list. - * - * This is one underlying implementation for nvgpu_sgl. Not all nvgpu_sgt's use - * this particular implementation. Nor is a given OS required to use this at - * all. - */ -struct nvgpu_mem_sgl { - /* - * Internally this is implemented as a singly linked list. - */ - struct nvgpu_mem_sgl *next; - - /* - * There is both a phys address and a DMA address since some systems, - * for example ones with an IOMMU, may see these as different addresses. - */ - u64 phys; - u64 dma; - u64 length; -}; - -/* - * Iterate over the SGL entries in an SGT. - */ -#define nvgpu_sgt_for_each_sgl(__sgl__, __sgt__) \ - for ((__sgl__) = (__sgt__)->sgl; \ - (__sgl__) != NULL; \ - (__sgl__) = nvgpu_sgt_get_next(__sgt__, __sgl__)) - struct nvgpu_mem { /* * Populated for all nvgpu_mem structs - vidmem or system. @@ -252,37 +176,6 @@ static inline bool nvgpu_mem_is_valid(struct nvgpu_mem *mem) } -/** - * nvgpu_mem_sgt_create_from_mem - Create a scatter list from an nvgpu_mem. - * - * @g - The GPU. - * @mem - The source memory allocation to use. - * - * Create a scatter gather table from the passed @mem struct. This list lets the - * calling code iterate across each chunk of a DMA allocation for when that DMA - * allocation is not completely contiguous. - */ -struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g, - struct nvgpu_mem *mem); - -struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl); -u64 nvgpu_sgt_get_ipa(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl); -u64 nvgpu_sgt_ipa_to_pa(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len); -u64 nvgpu_sgt_get_phys(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl); -u64 nvgpu_sgt_get_dma(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl); -u64 nvgpu_sgt_get_length(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl); -u64 nvgpu_sgt_get_gpu_addr(struct gk20a *g, struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl, - struct nvgpu_gmmu_attrs *attrs); -void nvgpu_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt); - -bool nvgpu_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt); -u64 nvgpu_sgt_alignment(struct gk20a *g, struct nvgpu_sgt *sgt); - /** * nvgpu_mem_create_from_mem - Create a new nvgpu_mem struct from an old one. * diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt.h new file mode 100644 index 000000000..3868f8529 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt.h @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef NVGPU_SGT_H +#define NVGPU_SGT_H + +#include + +struct gk20a; +struct nvgpu_mem; +struct nvgpu_gmmu_attrs; + +struct nvgpu_sgt; + +/* + * Forward declared opaque placeholder type that does not really exist, but + * helps the compiler help us about getting types right. In reality, + * implementors of nvgpu_sgt_ops will have some concrete type in place of this. + */ +struct nvgpu_sgl; + +struct nvgpu_sgt_ops { + struct nvgpu_sgl *(*sgl_next)(struct nvgpu_sgl *sgl); + u64 (*sgl_phys)(struct gk20a *g, struct nvgpu_sgl *sgl); + u64 (*sgl_ipa)(struct gk20a *g, struct nvgpu_sgl *sgl); + u64 (*sgl_ipa_to_pa)(struct gk20a *g, struct nvgpu_sgl *sgl, + u64 ipa, u64 *pa_len); + u64 (*sgl_dma)(struct nvgpu_sgl *sgl); + u64 (*sgl_length)(struct nvgpu_sgl *sgl); + u64 (*sgl_gpu_addr)(struct gk20a *g, struct nvgpu_sgl *sgl, + struct nvgpu_gmmu_attrs *attrs); + /* + * If left NULL then iommuable is assumed to be false. + */ + bool (*sgt_iommuable)(struct gk20a *g, struct nvgpu_sgt *sgt); + + /* + * Note: this operates on the whole SGT not a specific SGL entry. + */ + void (*sgt_free)(struct gk20a *g, struct nvgpu_sgt *sgt); +}; + +/* + * Scatter gather table: this is a list of scatter list entries and the ops for + * interacting with those entries. + */ +struct nvgpu_sgt { + /* + * Ops for interacting with the underlying scatter gather list entries. + */ + const struct nvgpu_sgt_ops *ops; + + /* + * The first node in the scatter gather list. + */ + struct nvgpu_sgl *sgl; +}; + +/* + * This struct holds the necessary information for describing a struct + * nvgpu_mem's scatter gather list. + * + * This is one underlying implementation for nvgpu_sgl. Not all nvgpu_sgt's use + * this particular implementation. Nor is a given OS required to use this at + * all. + */ +struct nvgpu_mem_sgl { + /* + * Internally this is implemented as a singly linked list. + */ + struct nvgpu_mem_sgl *next; + + /* + * There is both a phys address and a DMA address since some systems, + * for example ones with an IOMMU, may see these as different addresses. + */ + u64 phys; + u64 dma; + u64 length; +}; + +/* + * Iterate over the SGL entries in an SGT. + */ +#define nvgpu_sgt_for_each_sgl(sgl, sgt) \ + for ((sgl) = (sgt)->sgl; \ + (sgl) != NULL; \ + (sgl) = nvgpu_sgt_get_next(sgt, sgl)) + +/** + * nvgpu_mem_sgt_create_from_mem - Create a scatter list from an nvgpu_mem. + * + * @g - The GPU. + * @mem - The source memory allocation to use. + * + * Create a scatter gather table from the passed @mem struct. This list lets the + * calling code iterate across each chunk of a DMA allocation for when that DMA + * allocation is not completely contiguous. + */ +struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g, + struct nvgpu_mem *mem); + +struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl); +u64 nvgpu_sgt_get_ipa(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl); +u64 nvgpu_sgt_ipa_to_pa(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len); +u64 nvgpu_sgt_get_phys(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl); +u64 nvgpu_sgt_get_dma(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl); +u64 nvgpu_sgt_get_length(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl); +u64 nvgpu_sgt_get_gpu_addr(struct gk20a *g, struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl, + struct nvgpu_gmmu_attrs *attrs); +void nvgpu_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt); + +bool nvgpu_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt); +u64 nvgpu_sgt_alignment(struct gk20a *g, struct nvgpu_sgt *sgt); + +#endif /* NVGPU_SGT_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt_os.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt_os.h new file mode 100644 index 000000000..59c55b7b6 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_sgt_os.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef NVGPU_SGT_OS_H +#define NVGPU_SGT_OS_H + +/* + * Abstract interface for exposing the OS interface for creating an nvgpu_sgt + * from an nvgpu_mem. The reason this is handled by the OS is because the + * nvgpu_mem - especially the part that defines the underlying SGT - is + * intrinsically tied to the OS. + */ + +struct gk20a; +struct nvgpu_sgt; +struct nvgpu_mem; + +/** + * nvgpu_sgt_os_create_from_mem - Create an nvgpu_sgt from an nvgpu_mem. + * + * @g - The GPU. + * @mem - The input nvgpu_mem object. + * + * Since a DMA allocation may well be discontiguous nvgpu requires that a + * table describe the chunks of memory that make up the DMA allocation. This + * scatter gather table, SGT, must be created from an nvgpu_mem. Since the + * representation of a DMA allocation varies wildly from OS to OS the OS is + * tasked with creating an implementation of the nvgpu_sgt op interface. + * + * This function should be defined by each OS. It should create an nvgpu_sgt + * object from the passed nvgpu_mem. The nvgpu_mem and the nvgpu_sgt together + * abstract the DMA allocation in such a way that the GMMU can map any buffer + * from any OS. + * + * The nvgpu_sgt object returned by this function must be freed by the + * nvgpu_sgt_free() function. + * + * Returns %NULL on failure or an nvgpu_sgt object on success. + */ +struct nvgpu_sgt *nvgpu_sgt_os_create_from_mem(struct gk20a *g, + struct nvgpu_mem *mem); + +#endif /* NVGPU_SGT_OS_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/page_allocator.h b/drivers/gpu/nvgpu/include/nvgpu/page_allocator.h index a6e020584..cf60349cb 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/page_allocator.h +++ b/drivers/gpu/nvgpu/include/nvgpu/page_allocator.h @@ -25,6 +25,7 @@ #include #include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/include/nvgpu/vm.h b/drivers/gpu/nvgpu/include/nvgpu/vm.h index 24778e976..50f530714 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vm.h @@ -33,6 +33,7 @@ struct vm_gk20a; struct nvgpu_vm_area; +struct nvgpu_sgt; struct gk20a_comptag_allocator; /* diff --git a/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c index 51dfd6d98..6c45a920a 100644 --- a/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -367,8 +368,8 @@ struct nvgpu_sgt *nvgpu_linux_sgt_create(struct gk20a *g, struct sg_table *sgt) return nvgpu_sgt; } -struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g, - struct nvgpu_mem *mem) +struct nvgpu_sgt *nvgpu_sgt_os_create_from_mem(struct gk20a *g, + struct nvgpu_mem *mem) { return nvgpu_linux_sgt_create(g, mem->priv.sgt); } diff --git a/drivers/gpu/nvgpu/os/posix/posix-nvgpu_mem.c b/drivers/gpu/nvgpu/os/posix/posix-nvgpu_mem.c index 213acf53f..9c9fb276c 100644 --- a/drivers/gpu/nvgpu/os/posix/posix-nvgpu_mem.c +++ b/drivers/gpu/nvgpu/os/posix/posix-nvgpu_mem.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #define DMA_ERROR_CODE (~(u64)0x0) @@ -117,8 +119,8 @@ static struct nvgpu_sgt_ops nvgpu_sgt_posix_ops = { .sgt_free = nvgpu_mem_sgt_free, }; -struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g, - struct nvgpu_mem *mem) +struct nvgpu_sgt *nvgpu_sgt_os_create_from_mem(struct gk20a *g, + struct nvgpu_mem *mem) { struct nvgpu_mem_sgl *sgl; struct nvgpu_sgt *sgt = nvgpu_kzalloc(g, sizeof(*sgt)); diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c index e24fc9c04..0cf3b5c71 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include diff --git a/userspace/units/mm/page_table/page_table.c b/userspace/units/mm/page_table/page_table.c index 395b2e0d7..729f7d396 100644 --- a/userspace/units/mm/page_table/page_table.c +++ b/userspace/units/mm/page_table/page_table.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include