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gpu: nvgpu: move sched error bad tsg recovery

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Move sched error bad tsg recovery from fifo_intr_gv11b.c
to common/rc/rc.c

JIRA NVGPU-1314

Change-Id: Ic731a3162cad2fe184d764f0b3ad98acc1f382cb
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2095621
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-04-11 13:43:01 -07:00
committed by mobile promotions
parent 8c5c9de72a
commit c570ba99ed
3 changed files with 9 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/gpu/nvgpu/common/rc/rc.c
View File

@@ -130,3 +130,10 @@ void nvgpu_rc_gr_fault(struct gk20a *g, struct tsg_gk20a *tsg,
false, false, true, RC_TYPE_GR_FAULT);
}
}
void nvgpu_rc_sched_error_bad_tsg(struct gk20a *g)
{
/* id is unknown, preempt all runlists and do recovery */
gk20a_fifo_recover(g, 0, INVAL_ID, false, false, false,
RC_TYPE_SCHED_ERR);
}

3
drivers/gpu/nvgpu/hal/fifo/fifo_intr_gv11b.c
View File

@@ -140,8 +140,7 @@ bool gv11b_fifo_handle_sched_error(struct gk20a *g)
if (sched_error == SCHED_ERROR_CODE_BAD_TSG) {
/* id is unknown, preempt all runlists and do recovery */
gk20a_fifo_recover(g, 0, 0, false, false, false,
RC_TYPE_SCHED_ERR);
nvgpu_rc_sched_error_bad_tsg(g);
}
return false;

1
drivers/gpu/nvgpu/include/nvgpu/rc.h
View File

@@ -53,5 +53,6 @@ void nvgpu_rc_runlist_update(struct gk20a *g, u32 runlist_id);
void nvgpu_rc_preempt_timeout(struct gk20a *g, struct tsg_gk20a *tsg);
void nvgpu_rc_gr_fault(struct gk20a *g,
struct tsg_gk20a *tsg, struct channel_gk20a *ch);
void nvgpu_rc_sched_error_bad_tsg(struct gk20a *g);
#endif /* NVGPU_RC_H */