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gpu: nvgpu: use fixed address mapping for pma byte buffer
Use fixed address mapping for pma byte buffer so that the address of this buffer always fits in 32 bits. This also requires to move unmap sequence to OS specific function since different unmap API is now needed for linux and QNX. Also call nvgpu_prof_free_pma_stream_priv_data() before nvgpu_profiler_free_pma_stream() since former uses mm->perfbuf which is released in later. Bug 2510974 Jira NVGPU-5360 Change-Id: I398b0ca4f96527d6e09c9aacacb4b43c90f5bfc9 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2424691 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Alex Waterman
parent
7e6dcade98
commit
c6aae8c049
@@ -25,6 +25,11 @@
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#include <nvgpu/perfbuf.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/nvgpu_init.h>
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#include <nvgpu/vm_area.h>
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#include <nvgpu/utils.h>
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#define PERFBUF_PMA_BYTES_AVAILABLE_BUFFER_FIXED_GPU_VA 0x4000000ULL
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#define PERFBUF_PMA_BYTES_AVAILABLE_BUFFER_MAX_SIZE NVGPU_CPU_PAGE_SIZE
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int nvgpu_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
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{
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@@ -92,6 +97,24 @@ int nvgpu_perfbuf_init_vm(struct gk20a *g)
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return -ENOMEM;
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}
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/*
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* PMA available byte buffer GPU_VA needs to fit in 32 bit
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* register, hence use a fixed GPU_VA to map it.
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* Only one PMA stream is allowed right now so this works.
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* This should be updated later to support multiple PMA streams.
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*/
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mm->perfbuf.pma_bytes_available_buffer_gpu_va =
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PERFBUF_PMA_BYTES_AVAILABLE_BUFFER_FIXED_GPU_VA;
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err = nvgpu_vm_area_alloc(mm->perfbuf.vm,
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PERFBUF_PMA_BYTES_AVAILABLE_BUFFER_MAX_SIZE / SZ_4K,
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SZ_4K, &mm->perfbuf.pma_bytes_available_buffer_gpu_va,
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NVGPU_VM_AREA_ALLOC_FIXED_OFFSET);
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if (err != 0) {
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nvgpu_vm_put(mm->perfbuf.vm);
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return err;
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}
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err = g->ops.perfbuf.init_inst_block(g);
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if (err != 0) {
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nvgpu_vm_put(mm->perfbuf.vm);
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@@ -109,7 +132,12 @@ void nvgpu_perfbuf_deinit_inst_block(struct gk20a *g)
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void nvgpu_perfbuf_deinit_vm(struct gk20a *g)
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{
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struct mm_gk20a *mm = &g->mm;
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g->ops.perfbuf.deinit_inst_block(g);
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nvgpu_vm_area_free(mm->perfbuf.vm,
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mm->perfbuf.pma_bytes_available_buffer_gpu_va);
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nvgpu_vm_put(g->mm.perfbuf.vm);
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}
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@@ -538,21 +538,10 @@ int nvgpu_profiler_alloc_pma_stream(struct nvgpu_profiler_object *prof)
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void nvgpu_profiler_free_pma_stream(struct nvgpu_profiler_object *prof)
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{
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struct gk20a *g = prof->g;
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struct mm_gk20a *mm = &g->mm;
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if (prof->pma_buffer_va == 0U) {
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return;
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if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM]) {
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nvgpu_perfbuf_deinit_vm(g);
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nvgpu_profiler_pm_resource_release(prof,
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NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM);
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}
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nvgpu_vm_unmap(mm->perfbuf.vm, prof->pma_bytes_available_buffer_va, NULL);
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prof->pma_bytes_available_buffer_va = 0U;
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nvgpu_vm_unmap(mm->perfbuf.vm, prof->pma_buffer_va, NULL);
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prof->pma_buffer_va = 0U;
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prof->pma_buffer_size = 0U;
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nvgpu_perfbuf_deinit_vm(g);
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nvgpu_profiler_pm_resource_release(prof,
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NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM);
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}
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