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gpu: nvgpu: add NVGPU_IOCTL_CHANNEL_PREEMPT_NEXT

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Add NVGPU_IOCTL_CHANNEL_PREEMPT_NEXT ioctl to check host and FECS status
and preempt pending load of context not belonging to the calling channel on
GR engine during context switch. This should be called after a submit with
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST to decrease worst case submit
to start latency for high interleave channel.
There is less than 0.002% chance that the ioctl blocks up to couple
miliseconds due to race condition of FECS status changing while being read.
Also fix bug with host reschedule for multiple runlists which needs to write
both runlist registers.

Bug 1987640
Bug 1924808
Change-Id: I0b7e2f91bd18b0b20928e5a3311b9426b1bf1848
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1549598
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
David Li
2017-11-10 07:26:01 -08:00
committed by mobile promotions
parent f006e2daeb
commit c6cd82008f
8 changed files with 175 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

45
include/trace/events/gk20a.h
View File

@@ -354,6 +354,51 @@ TRACE_EVENT(gk20a_channel_submitted_gpfifo,
__entry->flags, __entry->incr_id, __entry->incr_value)
);
TRACE_EVENT(gk20a_reschedule_preempt_next,
TP_PROTO(u32 chid, u32 fecs0, u32 engstat, u32 fecs1, u32 fecs2,
u32 preempt),
TP_ARGS(chid, fecs0, engstat, fecs1, fecs2, preempt),
TP_STRUCT__entry(
__field(u32, chid)
__field(u32, fecs0)
__field(u32, engstat)
__field(u32, fecs1)
__field(u32, fecs2)
__field(u32, preempt)
),
TP_fast_assign(
__entry->chid = chid;
__entry->fecs0 = fecs0;
__entry->engstat = engstat;
__entry->fecs1 = fecs1;
__entry->fecs2 = fecs2;
__entry->preempt = preempt;
),
TP_printk("chid=%d, fecs0=%#x, engstat=%#x, fecs1=%#x, fecs2=%#x,"
" preempt=%#x", __entry->chid, __entry->fecs0, __entry->engstat,
__entry->fecs1, __entry->fecs2, __entry->preempt)
);
TRACE_EVENT(gk20a_reschedule_preempted_next,
TP_PROTO(u32 chid),
TP_ARGS(chid),
TP_STRUCT__entry(
__field(u32, chid)
),
TP_fast_assign(
__entry->chid = chid;
),
TP_printk("chid=%d", __entry->chid)
);
TRACE_EVENT(gk20a_channel_reset,
TP_PROTO(u32 hw_chid, u32 tsgid),

4
include/uapi/linux/nvgpu.h
View File

@@ -1637,9 +1637,11 @@ struct nvgpu_boosted_ctx_args {
_IOW(NVGPU_IOCTL_MAGIC, 123, struct nvgpu_alloc_gpfifo_ex_args)
#define NVGPU_IOCTL_CHANNEL_SET_BOOSTED_CTX \
_IOW(NVGPU_IOCTL_MAGIC, 124, struct nvgpu_boosted_ctx_args)
#define NVGPU_IOCTL_CHANNEL_PREEMPT_NEXT \
_IO(NVGPU_IOCTL_MAGIC, 126)
#define NVGPU_IOCTL_CHANNEL_LAST \
_IOC_NR(NVGPU_IOCTL_CHANNEL_SET_BOOSTED_CTX)
_IOC_NR(NVGPU_IOCTL_CHANNEL_PREEMPT_NEXT)
#define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_alloc_gpfifo_ex_args)
/*